* Device Tree file for Marvell Armada CP110 Slave.
*/
+#include <dt-bindings/comphy/comphy_data.h>
+
/ {
cp110-slave {
#address-cells = <2>;
interrupt-parent = <&gic>;
ranges = <0x0 0x0 0xf4000000 0x2000000>;
+ cps_ethernet: ethernet@0 {
+ compatible = "marvell,armada-7k-pp22";
+ reg = <0x0 0x100000>, <0x129000 0xb000>;
+ clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
+ clock-names = "pp_clk", "gop_clk", "mg_clk";
+ status = "disabled";
+ dma-coherent;
+
+ cps_eth0: eth0 {
+ interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+ port-id = <0>;
+ gop-port-id = <0>;
+ status = "disabled";
+ };
+
+ cps_eth1: eth1 {
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ port-id = <1>;
+ gop-port-id = <2>;
+ status = "disabled";
+ };
+
+ cps_eth2: eth2 {
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ port-id = <2>;
+ gop-port-id = <3>;
+ status = "disabled";
+ };
+ };
+
+ cps_mdio: mdio@12a200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0x12a200 0x10>;
+ };
+
cps_syscon0: system-controller@440000 {
compatible = "marvell,cp110-system-controller0",
"syscon";
"cps-usb3dev", "cps-eip150", "cps-eip197";
};
+ cps_pinctl: cps-pinctl@440000 {
+ compatible = "marvell,mvebu-pinctrl",
+ "marvell,a80x0-cp1-pinctrl";
+ bank-name ="cp1-110";
+ reg = <0x440000 0x20>;
+ pin-count = <63>;
+ max-func = <0xf>;
+
+ cps_ge1_rgmii_pins: cps-ge-rgmii-pins-0 {
+ marvell,pins = < 0 1 2 3 4 5 6 7
+ 8 9 10 11 >;
+ marvell,function = <3>;
+ };
+ cps_spi1_pins: cps-spi-pins-1 {
+ marvell,pins = < 13 14 15 16 >;
+ marvell,function = <3>;
+ };
+ };
+
+ cps_gpio0: gpio@440100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x440100 0x40>;
+ ngpios = <32>;
+ gpiobase = <20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ cps_gpio1: gpio@440140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x440140 0x40>;
+ ngpios = <31>;
+ gpiobase = <52>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
cps_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci";
reg = <0x540000 0x30000>;
clocks = <&cps_syscon0 1 21>;
status = "disabled";
};
+
+ cps_comphy: comphy@441000 {
+ compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
+ reg = <0x441000 0x8>,
+ <0x120000 0x8>;
+ mux-bitcount = <4>;
+ max-lanes = <6>;
+ };
+
+ cps_utmi0: utmi@580000 {
+ compatible = "marvell,mvebu-utmi-2.6.0";
+ reg = <0x580000 0x1000>, /* utmi-unit */
+ <0x440420 0x4>, /* usb-cfg */
+ <0x440440 0x4>; /* utmi-cfg */
+ utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
+ status = "disabled";
+ };
};
cps_pcie0: pcie@f4600000 {