status = "disabled";
};
+ wdt: watchdog-timer@8300 {
+ compatible = "marvell,armada-3700-wdt";
+ reg = <0xd064 0x4>,
+ <0x8300 0x40>;
+ };
+
+ nb_periph_clk: nb-periph-clk@13000 {
+ compatible = "marvell,armada-3700-periph-clock-nb";
+ reg = <0x13000 0x100>;
+ clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
+ #clock-cells = <1>;
+ };
+
+ sb_periph_clk: sb-periph-clk@18000 {
+ compatible = "marvell,armada-3700-periph-clock-sb";
+ reg = <0x18000 0x100>;
+ clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
+ #clock-cells = <1>;
+ };
+
+ tbg: tbg@13200 {
+ compatible = "marvell,armada-3700-tbg-clock";
+ reg = <0x13200 0x100>;
+ #clock-cells = <1>;
+ };
+
pinctrl_nb: pinctrl-nb@13800 {
compatible = "marvell,armada3710-nb-pinctrl",
"syscon", "simple-mfd";
function = "mii";
};
+ smi_pins: smi-pins {
+ groups = "smi";
+ function = "smi";
+ };
+
sdio_pins: sdio-pins {
groups = "sdio_sb";
function = "sdio";
pcie_pins: pcie-pins {
groups = "pcie1";
- function = "pcie";
+ function = "gpio";
};
};
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
- clock-frequency = <160000>;
- spi-max-frequency = <40000>;
+ spi-max-frequency = <50000000>;
+ clocks = <&nb_periph_clk 7>;
status = "disabled";
};
- pinctl0: pinctl@13830 { /* north bridge */
- compatible = "marvell,armada-3700-pinctl";
- bank-name = "armada-3700-nb";
- reg = <0x13830 0x4>;
- pin-count = <36>;
- };
-
- pinctl1: pinctl@18830 { /* south bridge */
- compatible = "marvell,armada-3700-pinctl";
- bank-name = "armada-3700-sb";
- reg = <0x18830 0x4>;
- pin-count = <30>;
- };
-
comphy: comphy@18300 {
compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700";
reg = <0x18300 0x28>,
<0x1f300 0x3d000>;
- mux-bitcount = <1>;
- max-lanes = <2>;
+ mux-bitcount = <4>;
+ mux-lane-order = <1 0 2>;
+ max-lanes = <3>;
};
};
+
+ pcie0: pcie@d0070000 {
+ compatible = "marvell,armada-37xx-pcie";
+ reg = <0 0xd0070000 0 0x20000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ num-lanes = <1>;
+ status = "disabled";
+
+ bus-range = <0 0xff>;
+ ranges = <0x82000000 0 0xe8000000
+ 0 0xe8000000 0 0x1000000 /* Port 0 MEM */
+ 0x81000000 0 0xe9000000
+ 0 0xe9000000 0 0x10000>; /* Port 0 IO*/
+ };
};
};