Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk
[oweals/u-boot.git] / arch / arm / dts / armada-3720-db.dts
index f177c76f2e920a02fdf1971091b6bbcb2142b2e4..1b219c423bd796ac24794542f3d325eeadb35178 100644 (file)
        };
 };
 
+&comphy {
+       phy0 {
+               phy-type = <PHY_TYPE_PEX0>;
+               phy-speed = <PHY_SPEED_2_5G>;
+       };
+
+       phy1 {
+               phy-type = <PHY_TYPE_USB3_HOST0>;
+               phy-speed = <PHY_SPEED_5G>;
+       };
+};
+
 &eth0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
        status = "okay";
        phy-mode = "rgmii";
 };
 
 &i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins>;
        status = "okay";
 };
 
        status = "okay";
 };
 
+&sdhci0 {
+       bus-width = <4>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio_pins>;
+       status = "okay";
+};
+
+&sdhci1 {
+       non-removable;
+       bus-width = <8>;
+       mmc-ddr-1_8v;
+       mmc-hs400-1_8v;
+       marvell,pad-type = "fixed-1-8v";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc_pins>;
+       status = "okay";
+
+       #address-cells = <1>;
+       #size-cells = <0>;
+       mmccard: mmccard@0 {
+               compatible = "mmc-card";
+               reg = <0>;
+       };
+};
+
 &spi0 {
        status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi_quad_pins>;
 
        spi-flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "st,m25p128", "spi-flash";
+               compatible = "st,m25p128", "jedec,spi-nor";
                reg = <0>; /* Chip select 0 */
                spi-max-frequency = <50000000>;
                m25p,fast-read;
 
 /* Exported on the micro USB connector CON32 through an FTDI */
 &uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       status = "okay";
+};
+
+/* CON29 */
+&usb2 {
        status = "okay";
 };
 
 &usb3 {
        status = "okay";
 };
+
+/* CON17 */
+&pcie0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};