ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK

[oweals/u-boot.git] / arch / arm / dts / am335x-pdu001.dts

diff --git a/arch/arm/dts/am335x-pdu001.dts b/arch/arm/dts/am335x-pdu001.dts
index bdf3b277def6e61afa7d8a2b0673087ae4e76759..ae43d61f4e8b4333fa137bd315f05e079fd812b6 100644 (file)
--- a/arch/arm/dts/am335x-pdu001.dts
+++ b/arch/arm/dts/am335x-pdu001.dts
@@ -18,7 +18,7 @@
 
 / {
        model = "EETS,PDU001";
-       compatible = "eets,pdu001", "ti,am33xx";
+       compatible = "ti,am33xx";
 
        chosen {
                stdout-path = &uart3;
@@ -304,12 +304,12 @@
        clock-frequency = <100000>;
 
        board_24aa025e48: board_24aa025e48@50 {
-               compatible = "microchip,24aa025e48";
+               compatible = "atmel,24c02";
                reg = <0x50>;
        };
 
        backplane_24aa025e48: backplane_24aa025e48@53 {
-               compatible = "microchip,24aa025e48";
+               compatible = "atmel,24c02";
                reg = <0x53>;
        };
 
@@ -373,8 +373,8 @@
        ti,pindir-d0-out-d1-in;
        status = "okay";
 
-       cfaf240320a032t {
-               compatible = "orise,otm3225a";
+       display-controller@0 {
+               compatible = "orisetech,otm3225a";
                reg = <0>;
                spi-max-frequency = <1000000>;
                // SPI mode 3
@@ -533,16 +533,24 @@
        pinctrl-names = "default";
        pinctrl-0 = <&davinci_mdio_default>;
        status = "okay";
+
+       ethphy0: ethernet-phy@0 {
+               reg = <0>;
+       };
+
+       ethphy1: ethernet-phy@1 {
+               reg = <1>;
+       };
 };
 
 &cpsw_emac0 {
-       phy_id = <&davinci_mdio>, <0>;
+       phy-handle = <&ethphy0>;
        phy-mode = "mii";
        dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
-       phy_id = <&davinci_mdio>, <1>;
+       phy-handle = <&ethphy1>;
        phy-mode = "mii";
        dual_emac_res_vlan = <2>;
 };
@@ -577,7 +585,7 @@
        bus-width = <4>;
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins>;
-       cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
 };
 
 &sham {