board: ls1012a: LS1012A-2G5RDB board support

[oweals/u-boot.git] / arch / arm / cpu / armv8 / zynqmp / spl.c

diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c
index 6afa0740d045f693fa3f463c7f22602fae040149..41b0070a5e1ae3cbe4fdb8c4948edc3ac1fed9cd 100644 (file)
--- a/arch/arm/cpu/armv8/zynqmp/spl.c
+++ b/arch/arm/cpu/armv8/zynqmp/spl.c
@@ -17,7 +17,7 @@
 
 void board_init_f(ulong dummy)
 {
-       psu_init();
+       board_early_init_f();
        board_early_init_r();
 
 #ifdef CONFIG_DEBUG_UART
@@ -84,7 +84,7 @@ u32 spl_boot_device(void)
                return BOOT_DEVICE_RAM;
 #ifdef CONFIG_SPL_MMC_SUPPORT
        case SD_MODE1:
-       case SD1_LSHFT_MODE:
+       case SD1_LSHFT_MODE: /* not working on silicon v1 */
 /* if both controllers enabled, then these two are the second controller */
 #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
                return BOOT_DEVICE_MMC2;
@@ -101,6 +101,11 @@ u32 spl_boot_device(void)
 #ifdef CONFIG_SPL_SATA_SUPPORT
        case SW_SATA_MODE:
                return BOOT_DEVICE_SATA;
+#endif
+#ifdef CONFIG_SPL_SPI_SUPPORT
+       case QSPI_MODE_24BIT:
+       case QSPI_MODE_32BIT:
+               return BOOT_DEVICE_SPI;
 #endif
        default:
                printf("Invalid Boot Mode:0x%x\n", bootmode);
@@ -112,7 +117,7 @@ u32 spl_boot_device(void)
 
 u32 spl_boot_mode(const u32 boot_device)
 {
-       switch (spl_boot_device()) {
+       switch (boot_device) {
        case BOOT_DEVICE_RAM:
                return 0;
        case BOOT_DEVICE_MMC1: