.globl _start
_start:
- b reset
-
#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK
/*
* Various SoCs need something special and SoC-specific up front in
* use it here.
*/
#include <asm/arch/boot0.h>
-ARM_SOC_BOOT0_HOOK
+#else
+ b reset
#endif
.align 3
0:
/*
- * Enalbe SMPEN bit for coherency.
+ * Enable SMPEN bit for coherency.
* This register is not architectural but at the moment
* this bit should be set for A53/A57/A72.
*/
#ifdef CONFIG_ARMV8_SET_SMPEN
- mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */
+ switch_el x1, 3f, 1f, 1f
+3:
+ mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */
orr x0, x0, #0x40
msr S3_1_c15_c2_1, x0
+1:
#endif
/* Apply ARM core specific erratas */
/* Processor specific initialization */
bl lowlevel_init
-#if CONFIG_IS_ENABLED(ARMV8_SPIN_TABLE)
+#if defined(CONFIG_ARMV8_SPIN_TABLE) && !defined(CONFIG_SPL_BUILD)
branch_if_master x0, x1, master_cpu
b spin_table_secondary_jump
/* never return */