armv8: fsl-layerscape: Update README.falcon for compression

[oweals/u-boot.git] / arch / arm / cpu / armv8 / sec_firmware_asm.S

diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S b/arch/arm/cpu/armv8/sec_firmware_asm.S
index 5ed3677f5554abb8f09953d0af09540e78f7ef79..1c0f963e18af72409453d139db6ac2398e26bf32 100644 (file)
--- a/arch/arm/cpu/armv8/sec_firmware_asm.S
+++ b/arch/arm/cpu/armv8/sec_firmware_asm.S
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2016 NXP Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
@@ -23,12 +22,12 @@ WEAK(_sec_firmware_entry)
        /* Set exception return address hold pointer */
         adr    x4, 1f
         mov    x3, x4
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
         rev    w3, w3
 #endif
         str    w3, [x1]
         lsr    x3, x4, #32
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
         rev    w3, w3
 #endif
         str    w3, [x2]
@@ -41,7 +40,7 @@ WEAK(_sec_firmware_entry)
         ret
 ENDPROC(_sec_firmware_entry)
 
-#ifdef CONFIG_FSL_PPA_ARMV8_PSCI
+#ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
 ENTRY(_sec_firmware_support_psci_version)
        mov     x0, 0x84000000
        mov     x1, 0x0