Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

[oweals/u-boot.git] / arch / arm / cpu / armv8 / fsl-layerscape / fsl_lsch3_speed.c

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index f8fefc7cfc028ec06cbe98faf895a0f50bd5326c..a5540f2b9d4a23b2529e060267efb65e23aa4c1c 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -1,7 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014-2015, Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
+ * Copyright 2019 NXP Semiconductors
  *
  * Derived from arch/power/cpu/mpc85xx/speed.c
  */
@@ -26,10 +26,6 @@ DECLARE_GLOBAL_DATA_PTR;
 void get_sys_info(struct sys_info *sys_info)
 {
        struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
-#ifdef CONFIG_FSL_IFC
-       struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
-       u32 ccr;
-#endif
        struct ccsr_clk_cluster_group __iomem *clk_grp[2] = {
                (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR),
                (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR)
@@ -128,10 +124,8 @@ void get_sys_info(struct sys_info *sys_info)
        }
 
 #if defined(CONFIG_FSL_IFC)
-       ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
-       ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
-
-       sys_info->freq_localbus = sys_info->freq_systembus / ccr;
+       sys_info->freq_localbus = sys_info->freq_systembus /
+                                               CONFIG_SYS_FSL_IFC_CLK_DIV;
 #endif
 }
 
@@ -199,6 +193,16 @@ int get_dspi_freq(ulong dummy)
        return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int get_sdhc_freq(ulong dummy)
+{
+       if (!gd->arch.sdhc_clk)
+               get_clocks();
+
+       return gd->arch.sdhc_clk;
+}
+#endif
+
 int get_serial_clock(void)
 {
        return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -209,6 +213,11 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
        switch (clk) {
        case MXC_I2C_CLK:
                return get_i2c_freq(0);
+#if defined(CONFIG_FSL_ESDHC)
+       case MXC_ESDHC_CLK:
+       case MXC_ESDHC2_CLK:
+               return get_sdhc_freq(0);
+#endif
        case MXC_DSPI_CLK:
                return get_dspi_freq(0);
        default: