+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2015, Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
+ * Copyright 2019 NXP Semiconductors
*
* Derived from arch/power/cpu/mpc85xx/speed.c
*/
return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
}
+#ifdef CONFIG_FSL_ESDHC
+int get_sdhc_freq(ulong dummy)
+{
+ if (!gd->arch.sdhc_clk)
+ get_clocks();
+
+ return gd->arch.sdhc_clk;
+}
+#endif
+
int get_serial_clock(void)
{
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
switch (clk) {
case MXC_I2C_CLK:
return get_i2c_freq(0);
+#if defined(CONFIG_FSL_ESDHC)
+ case MXC_ESDHC_CLK:
+ case MXC_ESDHC2_CLK:
+ return get_sdhc_freq(0);
+#endif
case MXC_DSPI_CLK:
return get_dspi_freq(0);
default: