Merge branch 'master' of git://git.denx.de/u-boot-spi

[oweals/u-boot.git] / arch / arm / cpu / armv7 / start.S

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b18094447b0601e8a7ff539c0b286c693c66d5da..7eee54ba700211f27265cbbe86b816b24f3acc93 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -17,6 +17,7 @@
 #include <config.h>
 #include <asm/system.h>
 #include <linux/linkage.h>
+#include <asm/armv7.h>
 
 /*************************************************************************
  *
@@ -30,11 +31,24 @@
 
        .globl  reset
        .globl  save_boot_params_ret
+#ifdef CONFIG_ARMV7_LPAE
+       .global switch_to_hypervisor_ret
+#endif
 
 reset:
        /* Allow the board to save important registers */
        b       save_boot_params
 save_boot_params_ret:
+#ifdef CONFIG_ARMV7_LPAE
+/*
+ * check for Hypervisor support
+ */
+       mrc     p15, 0, r0, c0, c1, 1           @ read ID_PFR1
+       and     r0, r0, #CPUID_ARM_VIRT_MASK    @ mask virtualization bits
+       cmp     r0, #(1 << CPUID_ARM_VIRT_SHIFT)
+       beq     switch_to_hypervisor
+switch_to_hypervisor_ret:
+#endif
        /*
         * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
         * except if in HYP mode already
@@ -66,7 +80,9 @@ save_boot_params_ret:
        /* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
        bl      cpu_init_cp15
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        bl      cpu_init_crit
+#endif
 #endif
 
        bl      _main
@@ -101,6 +117,13 @@ ENTRY(save_boot_params)
 ENDPROC(save_boot_params)
        .weak   save_boot_params
 
+#ifdef CONFIG_ARMV7_LPAE
+ENTRY(switch_to_hypervisor)
+       b       switch_to_hypervisor_ret
+ENDPROC(switch_to_hypervisor)
+       .weak   switch_to_hypervisor
+#endif
+
 /*************************************************************************
  *
  * cpu_init_cp15
@@ -250,7 +273,8 @@ skip_errata_621766:
        mov     pc, r5                  @ back to my caller
 ENDPROC(cpu_init_cp15)
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+       !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
 /*************************************************************************
  *
  * CPU_init_critical registers