#include <config.h>
#include <asm/system.h>
#include <linux/linkage.h>
+#include <asm/armv7.h>
/*************************************************************************
*
.globl reset
.globl save_boot_params_ret
+#ifdef CONFIG_ARMV7_LPAE
+ .global switch_to_hypervisor_ret
+#endif
reset:
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
+#ifdef CONFIG_ARMV7_LPAE
+/*
+ * check for Hypervisor support
+ */
+ mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
+ and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits
+ cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT)
+ beq switch_to_hypervisor
+switch_to_hypervisor_ret:
+#endif
/*
* disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
* except if in HYP mode already
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_cp15
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
bl cpu_init_crit
+#endif
#endif
bl _main
ENDPROC(save_boot_params)
.weak save_boot_params
+#ifdef CONFIG_ARMV7_LPAE
+ENTRY(switch_to_hypervisor)
+ b switch_to_hypervisor_ret
+ENDPROC(switch_to_hypervisor)
+ .weak switch_to_hypervisor
+#endif
+
/*************************************************************************
*
* cpu_init_cp15
mov pc, r5 @ back to my caller
ENDPROC(cpu_init_cp15)
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+ !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
/*************************************************************************
*
* CPU_init_critical registers