usb: dra7xx: Add support for dra7xx xhci USB host

[oweals/u-boot.git] / arch / arm / cpu / armv7 / omap5 / prcm-regs.c

diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 7a7caded030511d1025c3e480efe08f36c841c7b..304ac1c17360c2242970fd3d53dae4b53cf25724 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -295,6 +295,7 @@ struct prcm_regs const omap5_es1_prcm = {
 struct omap_sys_ctrl_regs const omap5_ctrl = {
        .control_status                         = 0x4A002134,
        .control_std_fuse_opp_vdd_mpu_2         = 0x4A0021B4,
+       .control_phy_power_usb                  = 0x4A002370,
        .control_padconf_core_base              = 0x4A002800,
        .control_paconf_global                  = 0x4A002DA0,
        .control_paconf_mode                    = 0x4A002DA4,
@@ -526,8 +527,6 @@ struct prcm_regs const omap5_es2_prcm = {
        .cm1_abe_timer8_clkctrl = 0x4a004580,
        .cm1_abe_wdt3_clkctrl = 0x4a004588,
 
-
-
        /* cm2.ckgen */
        .cm_clksel_mpu_m3_iss_root = 0x4a008100,
        .cm_clksel_usb_60mhz = 0x4a008104,
@@ -569,6 +568,7 @@ struct prcm_regs const omap5_es2_prcm = {
        .cm_div_m2_dpll_unipro = 0x4a0081d0,
        .cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8,
        .cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec,
+       .cm_coreaon_usb_phy_core_clkctrl = 0x4A008640,
        .cm_coreaon_bandgap_clkctrl = 0x4a008648,
        .cm_coreaon_io_srcomp_clkctrl = 0x4a008650,
 
@@ -700,6 +700,8 @@ struct prcm_regs const omap5_es2_prcm = {
        .cm_l3init_p1500_clkctrl = 0x4a009678,
        .cm_l3init_fsusb_clkctrl = 0x4a0096d0,
        .cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
+       .cm_l3init_ocp2scp3_clkctrl = 0x4a0096e8,
+       .cm_l3init_usb_otg_ss_clkctrl = 0x4a0096f0,
 
        /* prm irqstatus regs */
        .prm_irqstatus_mpu_2 = 0x4ae06014,
@@ -791,6 +793,7 @@ struct prcm_regs const dra7xx_prcm = {
        .cm_clkmode_dpll_dsp                    = 0x4a005234,
        .cm_shadow_freq_config1                 = 0x4a005260,
        .cm_clkmode_dpll_gmac                   = 0x4a0052a8,
+       .cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688,
 
        /* cm1.mpu */
        .cm_mpu_mpu_clkctrl                     = 0x4a005320,