arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weak

[oweals/u-boot.git] / arch / arm / cpu / armv7 / omap5 / prcm-regs.c

diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index ff328070f77de8e85802c3563f70fcca68700b84..0745d424e2c4803cb1c7db082c1b0983ee004885 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -376,6 +376,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
 
 struct omap_sys_ctrl_regs const dra7xx_ctrl = {
        .control_status                         = 0x4A002134,
+       .control_phy_power_usb                  = 0x4A002370,
        .control_phy_power_sata                 = 0x4A002374,
        .control_core_mac_id_0_lo               = 0x4A002514,
        .control_core_mac_id_0_hi               = 0x4A002518,
@@ -432,7 +433,7 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
        .control_srcomp_code_latch              = 0x4A002E84,
        .control_ddr_control_ext_0              = 0x4A002E88,
        .control_padconf_core_base              = 0x4A003400,
-       .control_std_fuse_opp_vdd_mpu_2         = 0x4A003B24,
+       .control_std_fuse_opp_vdd_mpu_2         = 0x4A003B20,
        .control_port_emif1_sdram_config        = 0x4AE0C110,
        .control_port_emif1_lpddr2_nvm_config   = 0x4AE0C114,
        .control_port_emif2_sdram_config        = 0x4AE0C118,
@@ -447,10 +448,10 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
        .control_wkup_control_spare_r           = 0x4AE0C5B4,
        .control_wkup_control_spare_r_c0        = 0x4AE0C5B8,
        .control_srcomp_east_side_wkup          = 0x4AE0C5BC,
-       .control_efuse_1                        = 0x4AE0C5C0,
-       .control_efuse_2                        = 0x4AE0C5C4,
-       .control_efuse_3                        = 0x4AE0C5C8,
-       .control_efuse_4                        = 0x4AE0C5CC,
+       .control_efuse_1                        = 0x4AE0C5C8,
+       .control_efuse_2                        = 0x4AE0C5CC,
+       .control_efuse_3                        = 0x4AE0C5D0,
+       .control_efuse_4                        = 0x4AE0C5D4,
        .control_efuse_13                       = 0x4AE0C5F0,
 };
 
@@ -800,6 +801,7 @@ struct prcm_regs const dra7xx_prcm = {
        .cm_clkmode_dpll_dsp                    = 0x4a005234,
        .cm_shadow_freq_config1                 = 0x4a005260,
        .cm_clkmode_dpll_gmac                   = 0x4a0052a8,
+       .cm_coreaon_usb_phy_core_clkctrl        = 0x4a008640,
        .cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688,
 
        /* cm1.mpu */
@@ -906,6 +908,7 @@ struct prcm_regs const dra7xx_prcm = {
        .cm_gmac_gmac_clkctrl                   = 0x4a0093d0,
        .cm_l3init_ocp2scp1_clkctrl             = 0x4a0093e0,
        .cm_l3init_ocp2scp3_clkctrl             = 0x4a0093e8,
+       .cm_l3init_usb_otg_ss_clkctrl           = 0x4a0093f0,
 
        /* cm2.l4per */
        .cm_l4per_clkstctrl                     = 0x4a009700,