.ctrl_ddrio_1 = 0x84210840,
.ctrl_ddrio_2 = 0x84210000,
.ctrl_emif_sdram_config_ext = 0x0001C1A7,
- .ctrl_emif_sdram_config_ext_final = 0x000101A7,
+ .ctrl_emif_sdram_config_ext_final = 0x0001C1A7,
.ctrl_ddr_ctrl_ext_0 = 0xA2000000,
};
break;
case DRA752_ES1_0:
case DRA752_ES1_1:
+ case DRA722_ES1_0:
*regs = &ioregs_dra7xx_es1;
break;