imx:mx6 fix return value of mxc_get_clock

[oweals/u-boot.git] / arch / arm / cpu / armv7 / mx6 / soc.c

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index affbf7f702a76e6d1cd1857d71c689e14711d88f..5f5f49720107f56717e676eafbfd94983ffee9b4 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -22,6 +22,8 @@
 #include <asm/arch/mxc_hdmi.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/bootm.h>
+#include <dm.h>
+#include <imx_thermal.h>
 
 enum ldo_reg {
        LDO_ARM,
@@ -37,6 +39,19 @@ struct scu_regs {
        u32     fpga_rev;
 };
 
+#if defined(CONFIG_IMX6_THERMAL)
+static const struct imx_thermal_plat imx6_thermal_plat = {
+       .regs = (void *)ANATOP_BASE_ADDR,
+       .fuse_bank = 1,
+       .fuse_word = 6,
+};
+
+U_BOOT_DEVICE(imx6_thermal) = {
+       .name = "imx_thermal",
+       .platdata = &imx6_thermal_plat,
+};
+#endif
+
 u32 get_nr_cpus(void)
 {
        struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
@@ -350,8 +365,8 @@ void boot_mode_apply(unsigned cfg_val)
 /*
  * cfg_val will be used for
  * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
- * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
- * to SBMR1, which will determine the boot device.
+ * After reset, if GPR10[28] is 1, ROM will use GPR9[25:0]
+ * instead of SBMR1 to determine the boot device.
  */
 const struct boot_mode soc_boot_modes[] = {
        {"normal",      MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},