Merge branch 'master' of git://git.denx.de/u-boot-fdt
[oweals/u-boot.git] / arch / arm / cpu / armv7 / am33xx / clock_am43xx.c
index 57f59494768ee7a08ec56c5453a233cc042c9cd1..529a11951401764696bfb3d5006573c95509f329 100644 (file)
@@ -53,6 +53,8 @@ const struct dpll_regs dpll_ddr_regs = {
 
 void setup_clocks_for_console(void)
 {
+       u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_DISABLED;
+
        /* Do not add any spl_debug prints in this function */
        clrsetbits_le32(&cmwkup->wkclkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK,
                        CD_CLKCTRL_CLKTRCTRL_SW_WKUP <<
@@ -63,6 +65,13 @@ void setup_clocks_for_console(void)
                        MODULE_CLKCTRL_MODULEMODE_MASK,
                        MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
                        MODULE_CLKCTRL_MODULEMODE_SHIFT);
+
+       while ((idlest == MODULE_CLKCTRL_IDLEST_DISABLED) ||
+               (idlest == MODULE_CLKCTRL_IDLEST_TRANSITIONING)) {
+               clkctrl = readl(&cmwkup->wkup_uart0ctrl);
+               idlest = (clkctrl & MODULE_CLKCTRL_IDLEST_MASK) >>
+                        MODULE_CLKCTRL_IDLEST_SHIFT;
+       }
 }
 
 void enable_basic_clocks(void)
@@ -97,6 +106,7 @@ void enable_basic_clocks(void)
                &cmper->gpio4clkctrl,
                &cmper->gpio5clkctrl,
                &cmper->i2c1clkctrl,
+               &cmper->cpgmac0clkctrl,
                &cmper->emiffwclkctrl,
                &cmper->emifclkctrl,
                &cmper->otfaemifclkctrl,
@@ -108,4 +118,7 @@ void enable_basic_clocks(void)
 
        /* Select the Master osc clk as Timer2 clock source */
        writel(0x1, &cmdpll->clktimer2clk);
+
+       /* For OPP100 the mac clock should be /5. */
+       writel(0x4, &cmdpll->clkselmacclk);
 }