mxs: Only build internal Ethernet controller for i.MX28

[oweals/u-boot.git] / arch / arm / cpu / arm926ejs / mxs / spl_power_init.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 6dd3bfc9bc9dce7f59639820387a44bf7a8f458e..4b917bd186df4ea62651690c1a99c91ff2b0118a 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -661,17 +661,14 @@ void mxs_power_configure_power_source(void)
 
        mxs_src_power_init();
 
-       batt_ready = mxs_is_batt_ready();
-
        if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
-               batt_good = mxs_is_batt_good();
+               batt_ready = mxs_is_batt_ready();
                if (batt_ready) {
                        /* 5V source detected, good battery detected. */
                        mxs_batt_boot();
                } else {
-                       if (batt_good) {
-                               /* 5V source detected, low battery detceted. */
-                       } else {
+                       batt_good = mxs_is_batt_good();
+                       if (!batt_good) {
                                /* 5V source detected, bad battery detected. */
                                writel(LRADC_CONVERSION_AUTOMATIC,
                                        &lradc_regs->hw_lradc_conversion_clr);
@@ -720,7 +717,7 @@ int mxs_get_vddio_power_source_off(void)
                tmp = readl(&power_regs->hw_power_vddioctrl);
                if (tmp & POWER_VDDIOCTRL_DISABLE_FET) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }
@@ -728,7 +725,7 @@ int mxs_get_vddio_power_source_off(void)
                if (!(readl(&power_regs->hw_power_5vctrl) &
                        POWER_5VCTRL_ENABLE_DCDC)) {
                        if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) ==
-                               POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) {
+                               POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) {
                                return 1;
                        }
                }
@@ -776,7 +773,7 @@ void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
        uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 25) / 50;
 
        cur_target = readl(&power_regs->hw_power_vddioctrl);
        cur_target &= POWER_VDDIOCTRL_TRG_MASK;
@@ -862,8 +859,8 @@ void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
        }
 
        clrsetbits_le32(&power_regs->hw_power_vddioctrl,
-                       POWER_VDDDCTRL_BO_OFFSET_MASK,
-                       new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
+                       POWER_VDDIOCTRL_BO_OFFSET_MASK,
+                       new_brownout << POWER_VDDIOCTRL_BO_OFFSET_OFFSET);
 }
 
 void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
@@ -873,7 +870,7 @@ void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
        uint32_t cur_target, diff, bo_int = 0;
        uint32_t powered_by_linreg = 0;
 
-       new_brownout = new_target - new_brownout;
+       new_brownout = (new_target - new_brownout + 12) / 25;
 
        cur_target = readl(&power_regs->hw_power_vdddctrl);
        cur_target &= POWER_VDDDCTRL_TRG_MASK;