*/
#include <common.h>
-
+#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_pit.h>
#include <asm/arch/at91_gpbr.h>
#include <asm/arch/clk.h>
-#include <asm/arch/io.h>
#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 0
return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
}
+void arch_preboot_os(void)
+{
+ ulong cpiv;
+ at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
+
+ cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
+
+ /*
+ * Disable PITC
+ * Add 0x1000 to current counter to stop it faster
+ * without waiting for wrapping back to 0
+ */
+ writel(cpiv + 0x1000, &pit->mr);
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
char buf[32];
- printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME);
+ printf("CPU: %s\n", ATMEL_CPU_NAME);
printf("Crystal frequency: %8s MHz\n",
strmhz(buf, get_main_clk_rate()));
printf("CPU clock : %8s MHz\n",
*/
void bootcount_store (ulong a)
{
- at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+ at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
ulong bootcount_load (void)
{
- at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+ at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))