usb: lowlevel interface change to support multiple controllers

[oweals/u-boot.git] / arch / arm / cpu / arm920t / start.S

diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 6db61c215c515c458d2ef494d937356cca81d126..14c9156c084aebacdebb12ce0fa44e07cd940627 100644 (file)
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -1,8 +1,8 @@
 /*
  *  armboot - Startup Code for ARM920 CPU-core
  *
- *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  *  Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
@@ -89,6 +89,10 @@ _bss_start_ofs:
 _bss_end_ofs:
        .word __bss_end__ - _start
 
+.globl _end_ofs
+_end_ofs:
+       .word _end - _start
+
 #ifdef CONFIG_USE_IRQ
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
@@ -138,11 +142,11 @@ copyex:
 
 # if defined(CONFIG_S3C2400)
 #  define pWTCON       0x15300000
-#  define INTMSK       0x14400008      /* Interupt-Controller base addresses */
+#  define INTMSK       0x14400008      /* Interrupt-Controller base addresses */
 #  define CLKDIVN      0x14800014      /* clock divisor register */
 #else
 #  define pWTCON       0x53000000
-#  define INTMSK       0x4A000008      /* Interupt-Controller base addresses */
+#  define INTMSK       0x4A000008      /* Interrupt-Controller base addresses */
 #  define INTSUBMSK    0x4A00001C
 #  define CLKDIVN      0x4C000014      /* clock divisor register */
 # endif
@@ -206,6 +210,7 @@ stack_setup:
 
        adr     r0, _start
        cmp     r0, r6
+       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
        beq     clear_bss               /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
@@ -217,7 +222,7 @@ copy_loop:
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
        /*
         * fix .rel.dyn relocations
         */
@@ -259,7 +264,7 @@ fixnext:
 #endif
 
 clear_bss:
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
        ldr     r0, _bss_start_ofs
        ldr     r1, _bss_end_ofs
        mov     r4, r6                  /* reloc addr */
@@ -267,13 +272,15 @@ clear_bss:
        add     r1, r1, r4
        mov     r2, #0x00000000         /* clear                            */
 
-clbss_l:str    r2, [r0]                /* clear loop...                    */
+clbss_l:cmp    r0, r1                  /* clear loop... */
+       bhs     clbss_e                 /* if reached end of bss, exit */
+       str     r2, [r0]
        add     r0, r0, #4
-       cmp     r0, r1
-       bne     clbss_l
+       b       clbss_l
+clbss_e:
 
        bl coloured_LED_init
-       bl red_LED_on
+       bl red_led_on
 #endif
 
 /*