config SYS_ARCH
default "arc"
-config USE_PRIVATE_LIBGCC
- default y
-
config SYS_CPU
default "arcv1" if ISA_ARCOMPACT
default "arcv2" if ISA_ARCV2
bool "Do not use Data Cache"
default n
-config ARC_CACHE_LINE_SHIFT
- int "Cache Line Length (as power of 2)"
- range 5 7
- default "6"
- depends on !SYS_DCACHE_OFF || !SYS_ICACHE_OFF
+menuconfig ARC_DBG
+ bool "ARC debugging"
+ default n
+
+if ARC_DBG
+
+config ARC_DBG_IOC_ENABLE
+ bool "Enable IO coherency unit"
+ depends on CPU_ARCHS38
+ default n
help
- Starting with ARC700 4.9, Cache line length is configurable,
- This option specifies "N", with Line-len = 2 power N
- So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
- Linux only supports same line lengths for I and D caches.
+ Enable IO coherency unit to debug problems with caches and
+ DMA peripherals.
+ NOTE: as of today linux will not work properly if this option
+ is enabled in u-boot!
+
+endif
choice
prompt "Target select"
-
-config TARGET_DUMMY
- bool "Dummy target"
- help
- Please select one of real target boards below!
- This target is only meant to force "makedefconfig" to put
- TARGET_xxx in defconfig even this is the first target from the list
- below.
+ default TARGET_AXS103
config TARGET_TB100
bool "Support tb100"
-config TARGET_ARCANGEL4
- bool "Support arcangel4"
+config TARGET_NSIM
+ bool "Support standalone nSIM & Free nSIM"
config TARGET_AXS101
- bool "Support axs101"
+ bool "Support Synopsys Designware SDP board AXS101"
+
+config TARGET_AXS103
+ bool "Support Synopsys Designware SDP board AXS103"
+
+config TARGET_HSDK
+ bool "Support Synpsys HS DevelopmentKit board"
endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
-source "board/synopsys/axs101/Kconfig"
+source "board/synopsys/axs10x/Kconfig"
+source "board/synopsys/hsdk/Kconfig"
endmenu