video: Remove legacy VESA and coreboot framebuffer drivers

[oweals/u-boot.git] / README

diff --git a/README b/README
index 17b3d5ac03c18d015c9d92e586bdc63d709fa64e..68d6a499c09f8166baa475f575bdd29ebebc59be 100644 (file)
--- a/README
+++ b/README
@@ -1361,7 +1361,7 @@ The following options need to be configured:
 
 - PWM Support:
                CONFIG_PWM_IMX
-               Support for PWM modul on the imx6.
+               Support for PWM module on the imx6.
 
 - TPM Support:
                CONFIG_TPM
@@ -2333,10 +2333,7 @@ CBFS (Coreboot Filesystem) support
                additional defines:
 
                CONFIG_SYS_NUM_I2C_BUSES
-               Hold the number of i2c buses you want to use. If you
-               don't use/have i2c muxes on your i2c bus, this
-               is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
-               omit this define.
+               Hold the number of i2c buses you want to use.
 
                CONFIG_SYS_I2C_DIRECT_BUS
                define this, if you don't use i2c muxes on your hardware.
@@ -2550,7 +2547,7 @@ CBFS (Coreboot Filesystem) support
                will skip addresses 0x50 and 0x68 on a board with one I2C bus
 
                        #define CONFIG_I2C_MULTI_BUS
-                       #define CONFIG_SYS_I2C_MULTI_NOPROBES   {{0,0x50},{0,0x68},{1,0x54}}
+                       #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
 
                will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
 
@@ -4490,7 +4487,7 @@ Low Level (hardware related) configuration options:
                CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
                data is located at the end of the available space
                (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
-               CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
+               GENERATED_GBL_DATA_SIZE), and the initial stack is just
                below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
                CONFIG_SYS_GBL_DATA_OFFSET) downward.
 
@@ -4549,11 +4546,6 @@ Low Level (hardware related) configuration options:
                enable SPI microcode relocation patch (MPC8xx);
                define relocation offset in DPRAM [SCC4]
 
-- CONFIG_SYS_USE_OSCCLK:
-               Use OSCM clock mode on MBX8xx board. Be careful,
-               wrong setting might damage your board. Read
-               doc/README.MBX before setting this variable!
-
 - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
                Offset of the bootmode word in DPRAM used by post
                (Power On Self Tests). This definition overrides