CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
Number of controllers used for other than main memory.
+ CONFIG_SYS_FSL_HAS_DP_DDR
+ Defines the SoC has DP-DDR used for DPAA.
+
CONFIG_SYS_FSL_SEC_BE
Defines the SEC controller register space as Big Endian
(0-5, cf. cfb_console.c)
VIDEO_FB_ADRS framebuffer address
VIDEO_KBD_INIT_FCT keyboard int fct
- (i.e. i8042_kbd_init())
+ (i.e. rx51_kp_init())
VIDEO_TSTC_FCT test char fct
- (i.e. i8042_tstc)
+ (i.e. rx51_kp_tstc)
VIDEO_GETC_FCT get char fct
- (i.e. i8042_getc)
- CONFIG_CONSOLE_CURSOR cursor drawing on/off
- (requires blink timer
- cf. i8042.c)
- CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
- CONFIG_CONSOLE_TIME display time/date info in
- upper right corner
- (requires CONFIG_CMD_DATE)
+ (i.e. rx51_kp_getc)
CONFIG_VIDEO_LOGO display Linux logo in
upper left corner
CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
a default value of 65536 will be defined.
- Keyboard Support:
- CONFIG_ISA_KEYBOARD
+ See Kconfig help for available keyboard drivers.
- Define this to enable standard (PC-Style) keyboard
- support
+ CONFIG_KEYBOARD
- CONFIG_I8042_KBD
- Standard PC keyboard driver with US (is default) and
- GERMAN key layout (switch via environment 'keymap=de') support.
- Export function i8042_kbd_init, i8042_tstc and i8042_getc
- for cfb_console. Supports cursor blinking.
+ Define this to enable a custom keyboard support.
+ This simply calls drv_keyboard_init() which must be
+ defined in your board-specific files. This option is deprecated
+ and is only used by novena. For new boards, use driver model
+ instead.
- Video support:
CONFIG_VIDEO
boot. See the documentation file README.video for a
description of this variable.
-
-- Keyboard Support:
- CONFIG_KEYBOARD
-
- Define this to enable a custom keyboard support.
- This simply calls drv_keyboard_init() which must be
- defined in your board-specific files.
- The only board using this so far is RBC823.
-
- LCD Support: CONFIG_LCD
Define this to enable LCD support (for output to LCD
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
- CONFIG_SPI_X
-
- Enables extended (16-bit) SPI EEPROM addressing.
- (symmetrical to CONFIG_I2C_X)
-
CONFIG_SOFT_SPI
Enables a software (bit-bang) SPI driver rather than
Scratch address used by the alternate memory test
You only need to set this if address zero isn't writeable
-- CONFIG_SYS_MEM_TOP_HIDE (PPC only):
+- CONFIG_SYS_MEM_RESERVE_SECURE
+ If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
+ is substracted from total RAM and won't be reported to OS.
+ This memory can be used as secure memory. A variable
+ gd->secure_ram is used to track the location. In systems
+ the RAM base is not zero, or RAM is divided into banks,
+ this variable needs to be recalcuated to get the address.
+
+- CONFIG_SYS_MEM_TOP_HIDE:
If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of RAM and won't get "touched" at all by U-Boot. By
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
Define minimum DDR size required for debug server image
-- CONFIG_SYS_MEM_TOP_HIDE_MIN
- Define minimum DDR size to be hided from top of the DDR memory
+- CONFIG_SYS_MC_RSV_MEM_ALIGN
+ Define alignment of reserved memory MC requires
Reproducible builds
-------------------