+#if 1
+ struct timeval tv;
+ struct tm tm_time;
+ int rtc;
+
+ rtc = rtc_xopen(pp_rtcname, O_WRONLY);
+ gettimeofday(&tv, NULL);
+ /* Prepare tm_time */
+ if (sizeof(time_t) == sizeof(tv.tv_sec)) {
+ if (utc)
+ gmtime_r((time_t*)&tv.tv_sec, &tm_time);
+ else
+ localtime_r((time_t*)&tv.tv_sec, &tm_time);
+ } else {
+ time_t t = tv.tv_sec;
+ if (utc)
+ gmtime_r(&t, &tm_time);
+ else
+ localtime_r(&t, &tm_time);
+ }
+#else
+/* Bloated code which tries to set hw clock with better precision.
+ * On x86, even though code does set hw clock within <1ms of exact
+ * whole seconds, apparently hw clock (at least on some machines)
+ * doesn't reset internal fractional seconds to 0,
+ * making all this a pointless excercise.
+ */
+ /* If we see that we are N usec away from whole second,
+ * we'll sleep for N-ADJ usecs. ADJ corrects for the fact
+ * that CPU is not infinitely fast.
+ * On infinitely fast CPU, next wakeup would be
+ * on (exactly_next_whole_second - ADJ). On real CPUs,
+ * this difference between current time and whole second
+ * is less than ADJ (assuming system isn't heavily loaded).
+ */
+ /* Small value of 256us gives very precise sync for 2+ GHz CPUs.
+ * Slower CPUs will fail to sync and will go to bigger
+ * ADJ values. qemu-emulated armv4tl with ~100 MHz
+ * performance ends up using ADJ ~= 4*1024 and it takes
+ * 2+ secs (2 tries with successively larger ADJ)
+ * to sync. Even straced one on the same qemu (very slow)
+ * takes only 4 tries.
+ */
+#define TWEAK_USEC 256
+ unsigned adj = TWEAK_USEC;
+ struct tm tm_time;
+ struct timeval tv;
+ int rtc = rtc_xopen(pp_rtcname, O_WRONLY);
+
+ /* Try to catch the moment when whole second is close */
+ while (1) {
+ unsigned rem_usec;
+ time_t t;
+
+ gettimeofday(&tv, NULL);
+
+ t = tv.tv_sec;
+ rem_usec = 1000000 - tv.tv_usec;
+ if (rem_usec < adj) {
+ /* Close enough */
+ small_rem:
+ t++;
+ }