-#define MAKE_CPU_PLL_CONFIG_VAL(divint, refdiv, range, outdiv) (((0x3F & divint) << 10) | ((0x1F & refdiv) << 16) | ((0x1 & range) << 21) | ((0x7 & outdiv) << 23))
-#define MAKE_CPU_CLK_CONTROL_VAL(cpudiv, ddrdiv, ahbdiv) (((0x3 & (cpudiv - 1)) << 5) | ((0x3 & (ddrdiv - 1)) << 10) | ((0x3 & (ahbdiv - 1)) << 15))
+#define MAKE_AR9331_CPU_PLL_CONFIG_VAL(divint, refdiv, range, outdiv) ( ((0x3F & divint) << 10) | \
+ ((0x1F & refdiv) << 16) | \
+ ((0x1 & range) << 21) | \
+ ((0x7 & outdiv) << 23) )
+
+#define MAKE_AR9331_CPU_CLK_CONTROL_VAL(cpudiv, ddrdiv, ahbdiv) ( ((0x3 & (cpudiv - 1)) << 5) | \
+ ((0x3 & (ddrdiv - 1)) << 10) | \
+ ((0x3 & (ahbdiv - 1)) << 15) )
+
+#define MAKE_AR9331_SPI_CONTROL_VAL(spidiv) ( ((spidiv >> 1) - 1) | 0x40 )