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ath79: fix PLL settings for QCA955x
[oweals/openwrt.git]
/
target
/
linux
/
ath79
/
dts
/
ar934x.dtsi
diff --git
a/target/linux/ath79/dts/ar934x.dtsi
b/target/linux/ath79/dts/ar934x.dtsi
index e05b29574861ac7d10396e7a87c45b10a2180bfc..3eed4de7993ba6c41144a403ef7c67e11e852ae6 100644
(file)
--- a/
target/linux/ath79/dts/ar934x.dtsi
+++ b/
target/linux/ath79/dts/ar934x.dtsi
@@
-217,8
+217,6
@@
builtin_switch: switch0@1f {
compatible = "qca,ar8229-builtin";
builtin_switch: switch0@1f {
compatible = "qca,ar8229-builtin";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x1f>;
resets = <&rst 8>;
reg = <0x1f>;
resets = <&rst 8>;
@@
-227,6
+225,9
@@
phy4-mii-enable;
mdio-bus {
phy4-mii-enable;
mdio-bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
swphy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "mii";
swphy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "mii";