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ath79: add WNDR3700 and WNDR3700v2
[oweals/openwrt.git]
/
target
/
linux
/
ath79
/
dts
/
ar9344_pcs_cr5000.dts
diff --git
a/target/linux/ath79/dts/ar9344_pcs_cr5000.dts
b/target/linux/ath79/dts/ar9344_pcs_cr5000.dts
index 0d38a3557eb2f311cd4ceaaef773a55767640af5..7c9103ced3c327c9689c1fdc85a16c7d48fab645 100644
(file)
--- a/
target/linux/ath79/dts/ar9344_pcs_cr5000.dts
+++ b/
target/linux/ath79/dts/ar9344_pcs_cr5000.dts
@@
-15,14
+15,12
@@
led-status = &status;
};
led-status = &status;
};
-
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
- #address-cells = <1>;
- #size-cells = <0>;
+
pinctrl-names = "default";
pinctrl-names = "default";
-
pinctrl-0 = <&jtag_disable_pins>;
+ pinctrl-0 = <&jtag_disable_pins>;
reset {
label = "Reset button";
reset {
label = "Reset button";
@@
-83,8
+81,6
@@
status = "okay";
flash@0 {
status = "okay";
flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
@@
-122,17
+118,13
@@
&usb {
status = "okay";
&usb {
status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
- port@1 {
+
hub_port1:
port@1 {
reg = <1>;
#trigger-source-cells = <0>;
reg = <1>;
#trigger-source-cells = <0>;
-
- hub_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
};
};
-
};
&usb_phy {
};
&usb_phy {
@@
-142,12
+134,13
@@
&pcie {
status = "okay";
&pcie {
status = "okay";
- ath9k: wifi@168c,0030 {
- compatible = "168c,0030";
+ ath9k: wifi@0,0 {
+ compatible = "pci168c,0030";
+ reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&art 0x5002>;
#gpio-cells = <2>;
gpio-controller;
mtd-mac-address = <&art 0x5002>;
#gpio-cells = <2>;
gpio-controller;
-
};
+ };
};
&mdio0 {
};
&mdio0 {
@@
-158,7
+151,7
@@
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
-
qca,ar8327-initvals = <
+ qca,ar8327-initvals = <
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
@@
-171,6
+164,8
@@
};
ð0 {
};
ð0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
/* default for ar934x, except for 1000M */
status = "okay";
/* default for ar934x, except for 1000M */
@@
-188,30
+183,35
@@
port@0 {
compatible = "swconfig,port";
port@0 {
compatible = "swconfig,port";
+ reg = <0>;
swconfig,segment = "lan";
swconfig,portmap = <1 1>;
};
port@1 {
compatible = "swconfig,port";
swconfig,segment = "lan";
swconfig,portmap = <1 1>;
};
port@1 {
compatible = "swconfig,port";
+ reg = <1>;
swconfig,segment = "lan";
swconfig,portmap = <2 2>;
};
port@2 {
compatible = "swconfig,port";
swconfig,segment = "lan";
swconfig,portmap = <2 2>;
};
port@2 {
compatible = "swconfig,port";
+ reg = <2>;
swconfig,segment = "lan";
swconfig,portmap = <3 3>;
};
port@3 {
compatible = "swconfig,port";
swconfig,segment = "lan";
swconfig,portmap = <3 3>;
};
port@3 {
compatible = "swconfig,port";
+ reg = <3>;
swconfig,segment = "lan";
swconfig,portmap = <4 4>;
};
port@4 {
compatible = "swconfig,port";
swconfig,segment = "lan";
swconfig,portmap = <4 4>;
};
port@4 {
compatible = "swconfig,port";
+ reg = <4>;
swconfig,segment = "wan";
swconfig,portmap = <5 5>;
};
swconfig,segment = "wan";
swconfig,portmap = <5 5>;
};