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arm: maxbcm: Enable SPL to include DDR training code into U-Boot
[oweals/u-boot.git]
/
include
/
configs
/
vct.h
diff --git
a/include/configs/vct.h
b/include/configs/vct.h
index 217ba2fbd9b22bfb68433fce18578b959ad7d246..83e4163e3f897e802443416ed8e9b155dd101178 100644
(file)
--- a/
include/configs/vct.h
+++ b/
include/configs/vct.h
@@
-25,6
+25,9
@@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)