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Davinci: ea20: use gpio framework to access gpios
[oweals/u-boot.git]
/
include
/
configs
/
ppmc8260.h
diff --git
a/include/configs/ppmc8260.h
b/include/configs/ppmc8260.h
index ff7d61439bb6a04ebe69f522573f9a2d7065c4c1..327863ec9056a6aacc8f023c51acb06d62081f4d 100644
(file)
--- a/
include/configs/ppmc8260.h
+++ b/
include/configs/ppmc8260.h
@@
-34,6
+34,8
@@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_TEXT_BASE 0xfe000000
+
/*****************************************************************************
*
* These settings must match the way _your_ board is set up
/*****************************************************************************
*
* These settings must match the way _your_ board is set up
@@
-76,7
+78,7
@@
#define CONFIG_SYS_PPMC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
#define CONFIG_SYS_PPMC_BOOT_LOW 1
/* What should the base address of the main FLASH be and how big is
- * it (in MBytes)? This must contain TEXT_BASE from board/ppmc8260/config.mk
+ * it (in MBytes)? This must contain
CONFIG_SYS_
TEXT_BASE from board/ppmc8260/config.mk
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
* The main FLASH is whichever is connected to *CS0. U-Boot expects
* this to be the SIMM.
*/
@@
-182,6
+184,10
@@
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
* Port pins used for bit-banged MII communictions (if applicable).
*/
#define MDIO_PORT 2 /* Port C */
+#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \
+ (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT )
+#define MDC_DECLARE MDIO_DECLARE
+
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
@@
-366,8
+372,8
@@
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
* - Select bus for bd/buffers (see 28-13)
* - Enable Full Duplex in FSMR
*/
-#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE
(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+#define CONFIG_SYS_CMXFCR_MASK
2
(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+#define CONFIG_SYS_CMXFCR_VALUE
2
(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
#define CONFIG_SYS_CPMFCR_RAMTYPE 0
#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
#endif /* CONFIG_ETHER_INDEX */
#define CONFIG_SYS_CPMFCR_RAMTYPE 0
#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
#endif /* CONFIG_ETHER_INDEX */
@@
-416,9
+422,8
@@
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
@@
-1000,13
+1005,4
@@
ORxG_TRLX |\
ORxG_EHTR)
#endif /* CONFIG_SYS_LED_BASE */
ORxG_TRLX |\
ORxG_EHTR)
#endif /* CONFIG_SYS_LED_BASE */
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#endif /* __CONFIG_H */
#endif /* __CONFIG_H */