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configs: at91sam9260ek/9g20ek: Update for DT and DM
[oweals/u-boot.git]
/
include
/
configs
/
ls1021aiot.h
diff --git
a/include/configs/ls1021aiot.h
b/include/configs/ls1021aiot.h
index db29fa2ba12eb5ca7b9d899246f612647c20aa2f..35d17b96f4ab264939608f56d678301eeb08ac66 100644
(file)
--- a/
include/configs/ls1021aiot.h
+++ b/
include/configs/ls1021aiot.h
@@
-7,8
+7,6
@@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_LS102XA
-
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_SYS_FSL_CLK
#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
#define CONFIG_SYS_FSL_CLK
@@
-36,11
+34,6
@@
#define CONFIG_CMD_EXT2
#endif
#define CONFIG_CMD_EXT2
#endif
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 12500000
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000
@@
-243,7
+236,7
@@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define CO
NFIG_TIMER_CLK_FREQ
12500000
+#define CO
UNTER_FREQUENCY
12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
@@
-274,12
+267,6
@@
#define CONFIG_LS102XA_STREAM_ID
#define CONFIG_LS102XA_STREAM_ID
-/*
- * Stack sizes
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (30 * 1024)
-
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \