projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
8xxx: Second UART port added for MPC85xx, MPC83xx, MPC86xx processors
[oweals/u-boot.git]
/
include
/
configs
/
delta.h
diff --git
a/include/configs/delta.h
b/include/configs/delta.h
index 15681208b62355232030a7f39c160d9165500e8c..e7186e83990a59bd5e86f279bc84afb3c0c5cbf5 100644
(file)
--- a/
include/configs/delta.h
+++ b/
include/configs/delta.h
@@
-34,17
+34,19
@@
#ifdef CONFIG_LCD
#define CONFIG_SHARP_LM8V31
#endif
#ifdef CONFIG_LCD
#define CONFIG_SHARP_LM8V31
#endif
-/* #define CONFIG_MMC 1 */
#define BOARD_LATE_INIT 1
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define BOARD_LATE_INIT 1
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
/*
* Size of malloc() pool
*/
-#define C
FG_MALLOC_LEN (CF
G_ENV_SIZE + 256*1024)
-#define C
FG_GBL_DATA_SIZE
128 /* size in bytes reserved for initial data */
+#define C
ONFIG_SYS_MALLOC_LEN (CONFI
G_ENV_SIZE + 256*1024)
+#define C
ONFIG_SYS_GBL_DATA_SIZE
128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
/*
* Hardware drivers
@@
-59,11
+61,11
@@
#endif
#define CONFIG_HARD_I2C 1 /* required for DA9030 access */
#endif
#define CONFIG_HARD_I2C 1 /* required for DA9030 access */
-#define C
FG_I2C_SPEED
400000 /* I2C speed */
-#define C
FG_I2C_SLAVE
1 /* I2C controllers address */
+#define C
ONFIG_SYS_I2C_SPEED
400000 /* I2C speed */
+#define C
ONFIG_SYS_I2C_SLAVE
1 /* I2C controllers address */
#define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */
#define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */
-#define C
FG_DA9030_EXTON_DELAY
100000 /* wait x us after DA9030 reset via EXTON */
-#define C
FG_I2C_INIT_BOARD
1
+#define C
ONFIG_SYS_DA9030_EXTON_DELAY
100000 /* wait x us after DA9030 reset via EXTON */
+#define C
ONFIG_SYS_I2C_INIT_BOARD
1
/* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */
#define DELTA_CHECK_KEYBD 1 /* check for keys pressed during boot */
/* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */
#define DELTA_CHECK_KEYBD 1 /* check for keys pressed during boot */
@@
-80,6
+82,7
@@
/*
* select serial console configuration
*/
/*
* select serial console configuration
*/
+#define CONFIG_PXA_SERIAL
#define CONFIG_FFUART 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_FFUART 1
/* allow to overwrite serial and ethaddr */
@@
-87,22
+90,49
@@
#define CONFIG_BAUDRATE 115200
#define CONFIG_BAUDRATE 115200
-/* #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT) */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#ifdef TURN_ON_ETHERNET
#ifdef TURN_ON_ETHERNET
-# define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
+
+#define CONFIG_CMD_PING
+
#else
#else
-# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_ENV \
- | CFG_CMD_NAND \
- | CFG_CMD_I2C) \
- & ~(CFG_CMD_NET \
- | CFG_CMD_FLASH \
- | CFG_CMD_IMLS))
+
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
#endif
#endif
+/* USB */
+#define CONFIG_USB_OHCI_NEW 1
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_DOS_PARTITION 1
+
+#include <asm/arch/pxa-regs.h> /* for OHCI_REGS_BASE */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE OHCI_REGS_BASE
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "delta"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#define CONFIG_BOOTDELAY -1
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_BOOTDELAY -1
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
@@
-114,7
+144,7
@@
#define CONFIG_CMDLINE_TAG
#define CONFIG_TIMESTAMP
#define CONFIG_CMDLINE_TAG
#define CONFIG_TIMESTAMP
-#if
(CONFIG_COMMANDS & CF
G_CMD_KGDB)
+#if
defined(CONFI
G_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@
-122,39
+152,41
@@
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define C
FG_HUSH_PARSER
1
-#define C
FG_PROMPT_HUSH_PS2
"> "
+#define C
ONFIG_SYS_HUSH_PARSER
1
+#define C
ONFIG_SYS_PROMPT_HUSH_PS2
"> "
-#define C
FG_LONGHELP
/* undef to save memory */
-#ifdef C
FG
_HUSH_PARSER
-#define C
FG_PROMPT
"$ " /* Monitor Command Prompt */
+#define C
ONFIG_SYS_LONGHELP
/* undef to save memory */
+#ifdef C
ONFIG_SYS
_HUSH_PARSER
+#define C
ONFIG_SYS_PROMPT
"$ " /* Monitor Command Prompt */
#else
#else
-#define C
FG_PROMPT
"=> " /* Monitor Command Prompt */
+#define C
ONFIG_SYS_PROMPT
"=> " /* Monitor Command Prompt */
#endif
#endif
-#define C
FG_CBSIZE
256 /* Console I/O Buffer Size */
-#define C
FG_PBSIZE (CFG_CBSIZE+sizeof(CFG
_PROMPT)+16) /* Print Buffer Size */
-#define C
FG_MAXARGS
16 /* max number of command args */
-#define C
FG_BARGSIZE CFG_CBSIZE
/* Boot Argument Buffer Size */
-#define C
FG_DEVICE_NULLDEV
1
+#define C
ONFIG_SYS_CBSIZE
256 /* Console I/O Buffer Size */
+#define C
ONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS
_PROMPT)+16) /* Print Buffer Size */
+#define C
ONFIG_SYS_MAXARGS
16 /* max number of command args */
+#define C
ONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot Argument Buffer Size */
+#define C
ONFIG_SYS_DEVICE_NULLDEV
1
-#define C
FG_MEMTEST_START
0x80400000 /* memtest works on */
-#define C
FG_MEMTEST_END
0x80800000 /* 4 ... 8 MB in DRAM */
+#define C
ONFIG_SYS_MEMTEST_START
0x80400000 /* memtest works on */
+#define C
ONFIG_SYS_MEMTEST_END
0x80800000 /* 4 ... 8 MB in DRAM */
-#
undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz
*/
+#
define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address
*/
-#define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */
-
-#define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */
+#define CONFIG_SYS_HZ 1000
/* Monahans Core Frequency */
/* Monahans Core Frequency */
-#define C
FG_MONAHANS_RUN_MODE_OSC_RATIO
16 /* valid values: 8, 16, 24, 31 */
-#define C
FG_MONAHANS_TURBO_RUN_MODE_RATIO
1 /* valid values: 1, 2 */
+#define C
ONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
16 /* valid values: 8, 16, 24, 31 */
+#define C
ONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
1 /* valid values: 1, 2 */
/* valid baudrates */
/* valid baudrates */
-#define C
FG_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
+#define C
ONFIG_SYS_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
-/* #define CFG_MMC_BASE 0xF0000000 */
+#ifdef CONFIG_MMC
+#define CONFIG_PXA_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_SYS_MMC_BASE 0xF0000000
+#endif
/*
* Stack sizes
/*
* Stack sizes
@@
-180,26
+212,26
@@
#define PHYS_SDRAM_4 0x83000000 /* SDRAM Bank #4 */
#define PHYS_SDRAM_4_SIZE 0x1000000 /* 64 MB */
#define PHYS_SDRAM_4 0x83000000 /* SDRAM Bank #4 */
#define PHYS_SDRAM_4_SIZE 0x1000000 /* 64 MB */
-#define C
FG_DRAM_BASE
0x80000000 /* at CS0 */
-#define C
FG_DRAM_SIZE
0x04000000 /* 64 MB Ram */
+#define C
ONFIG_SYS_DRAM_BASE
0x80000000 /* at CS0 */
+#define C
ONFIG_SYS_DRAM_SIZE
0x04000000 /* 64 MB Ram */
-#undef C
FG
_SKIP_DRAM_SCRUB
+#undef C
ONFIG_SYS
_SKIP_DRAM_SCRUB
/*
* NAND Flash
*/
/*
* NAND Flash
*/
-#undef C
F
G_NAND_LEGACY
+#undef C
ONFI
G_NAND_LEGACY
-#define C
FG_NAND0_BASE
0x0 /* 0x43100040 */ /* 0x10000000 */
-#undef C
FG
_NAND1_BASE
+#define C
ONFIG_SYS_NAND0_BASE
0x0 /* 0x43100040 */ /* 0x10000000 */
+#undef C
ONFIG_SYS
_NAND1_BASE
-#define C
FG_NAND_BASE_LIST { CFG
_NAND0_BASE }
-#define C
FG_MAX_NAND_DEVICE
1 /* Max number of NAND devices */
+#define C
ONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS
_NAND0_BASE }
+#define C
ONFIG_SYS_MAX_NAND_DEVICE
1 /* Max number of NAND devices */
/* nand timeout values */
/* nand timeout values */
-#define C
FG_NAND_PROG_ERASE_TO
3000
-#define C
FG_NAND_OTHER_TO
100
-#define C
FG_NAND_SENDCMD_RETRY
3
+#define C
ONFIG_SYS_NAND_PROG_ERASE_TO
3000
+#define C
ONFIG_SYS_NAND_OTHER_TO
100
+#define C
ONFIG_SYS_NAND_SENDCMD_RETRY
3
#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */
/* NAND Timing Parameters (in ns) */
#undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */
/* NAND Timing Parameters (in ns) */
@@
-216,9
+248,9
@@
#define NAND_TIMING_tAR 10
/* NAND debugging */
#define NAND_TIMING_tAR 10
/* NAND debugging */
-#define C
FG
_DFC_DEBUG1 /* usefull */
-#undef C
FG
_DFC_DEBUG2 /* noisy */
-#undef C
FG
_DFC_DEBUG3 /* extremly noisy */
+#define C
ONFIG_SYS
_DFC_DEBUG1 /* usefull */
+#undef C
ONFIG_SYS
_DFC_DEBUG2 /* noisy */
+#undef C
ONFIG_SYS
_DFC_DEBUG3 /* extremly noisy */
#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 1
#define CONFIG_MTD_DEBUG
#define CONFIG_MTD_DEBUG_VERBOSE 1
@@
-229,13
+261,12
@@
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
#define NAND_ChipID_UNKNOWN 0x00
#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-#define C
FG_NO_FLASH
1
+#define C
ONFIG_SYS_NO_FLASH
1
-#define C
FG_ENV_IS_IN_NAND
1
-#define C
FG_ENV_OFFSET
0x40000
-#define C
FG_ENV_OFFSET_REDUND
0x44000
-#define C
FG_ENV_SIZE
0x4000
+#define C
ONFIG_ENV_IS_IN_NAND
1
+#define C
ONFIG_ENV_OFFSET
0x40000
+#define C
ONFIG_ENV_OFFSET_REDUND
0x44000
+#define C
ONFIG_ENV_SIZE
0x4000
#endif /* __CONFIG_H */
#endif /* __CONFIG_H */