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mpc85xx: Add support for the P2020
[oweals/u-boot.git]
/
include
/
configs
/
dbau1x00.h
diff --git
a/include/configs/dbau1x00.h
b/include/configs/dbau1x00.h
index c0f5a0990015bc03c4b81cabcd823e9e9c75e179..a578038b541f4075f542a06cc62bc8a1468507d3 100644
(file)
--- a/
include/configs/dbau1x00.h
+++ b/
include/configs/dbau1x00.h
@@
-30,21
+30,21
@@
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_DBAU1X00 1
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_DBAU1X00 1
-#define CONFIG_
AU1X00
1 /* alchemy series cpu */
+#define CONFIG_
SOC_AU1X00
1 /* alchemy series cpu */
#ifdef CONFIG_DBAU1000
/* Also known as Merlot */
#ifdef CONFIG_DBAU1000
/* Also known as Merlot */
-#define CONFIG_
AU1000
1
+#define CONFIG_
SOC_AU1000
1
#else
#ifdef CONFIG_DBAU1100
#else
#ifdef CONFIG_DBAU1100
-#define CONFIG_
AU1100
1
+#define CONFIG_
SOC_AU1100
1
#else
#ifdef CONFIG_DBAU1500
#else
#ifdef CONFIG_DBAU1500
-#define CONFIG_
AU1500
1
+#define CONFIG_
SOC_AU1500
1
#else
#ifdef CONFIG_DBAU1550
/* Cabernet */
#else
#ifdef CONFIG_DBAU1550
/* Cabernet */
-#define CONFIG_
AU1550
1
+#define CONFIG_
SOC_AU1550
1
#else
#error "No valid board set"
#endif
#else
#error "No valid board set"
#endif
@@
-59,7
+59,7
@@
#define CONFIG_BAUDRATE 115200
/* valid baudrates */
#define CONFIG_BAUDRATE 115200
/* valid baudrates */
-#define C
FG_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
+#define C
ONFIG_SYS_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#undef CONFIG_BOOTARGS
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
#undef CONFIG_BOOTARGS
@@
-80,6
+80,15
@@
#endif /* CONFIG_DBAU1550 */
#endif /* CONFIG_DBAU1550 */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
/*
* Command line configuration.
*/
/*
* Command line configuration.
*/
@@
-121,77
+130,79
@@
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define C
FG_LONGHELP
/* undef to save memory */
+#define C
ONFIG_SYS_LONGHELP
/* undef to save memory */
-#define C
FG_PROMPT
"DbAu1xx0 # " /* Monitor Command Prompt */
+#define C
ONFIG_SYS_PROMPT
"DbAu1xx0 # " /* Monitor Command Prompt */
-#define C
FG_CBSIZE
256 /* Console I/O Buffer Size */
-#define C
FG_PBSIZE (CFG_CBSIZE+sizeof(CFG
_PROMPT)+16) /* Print Buffer Size */
-#define C
FG_MAXARGS
16 /* max number of command args*/
+#define C
ONFIG_SYS_CBSIZE
256 /* Console I/O Buffer Size */
+#define C
ONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS
_PROMPT)+16) /* Print Buffer Size */
+#define C
ONFIG_SYS_MAXARGS
16 /* max number of command args*/
-#define C
FG_MALLOC_LEN
128*1024
+#define C
ONFIG_SYS_MALLOC_LEN
128*1024
-#define C
FG_BOOTPARAMS_LEN
128*1024
+#define C
ONFIG_SYS_BOOTPARAMS_LEN
128*1024
-#define C
FG_MHZ
396
+#define C
ONFIG_SYS_MHZ
396
-#if (C
FG
_MHZ % 12) != 0
+#if (C
ONFIG_SYS
_MHZ % 12) != 0
#error "Invalid CPU frequency - must be multiple of 12!"
#endif
#error "Invalid CPU frequency - must be multiple of 12!"
#endif
-#define CFG_HZ (CFG_MHZ * 1000000) /* FIXME causes overflow in net.c */
+#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
+
+#define CONFIG_SYS_HZ 1000
-#define C
FG_SDRAM_BASE
0x80000000 /* Cached addr */
+#define C
ONFIG_SYS_SDRAM_BASE
0x80000000 /* Cached addr */
-#define C
FG_LOAD_ADDR
0x81000000 /* default load address */
+#define C
ONFIG_SYS_LOAD_ADDR
0x81000000 /* default load address */
-#define C
FG_MEMTEST_START
0x80100000
-#define C
FG_MEMTEST_END
0x80800000
+#define C
ONFIG_SYS_MEMTEST_START
0x80100000
+#define C
ONFIG_SYS_MEMTEST_END
0x80800000
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#ifdef CONFIG_DBAU1550
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#ifdef CONFIG_DBAU1550
-#define C
FG_MAX_FLASH_BANKS
2 /* max number of memory banks */
-#define C
FG_MAX_FLASH_SECT
(512) /* max number of sectors on one chip */
+#define C
ONFIG_SYS_MAX_FLASH_BANKS
2 /* max number of memory banks */
+#define C
ONFIG_SYS_MAX_FLASH_SECT
(512) /* max number of sectors on one chip */
#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
#else /* CONFIG_DBAU1550 */
#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
#else /* CONFIG_DBAU1550 */
-#define C
FG_MAX_FLASH_BANKS
2 /* max number of memory banks */
-#define C
FG_MAX_FLASH_SECT
(128) /* max number of sectors on one chip */
+#define C
ONFIG_SYS_MAX_FLASH_BANKS
2 /* max number of memory banks */
+#define C
ONFIG_SYS_MAX_FLASH_SECT
(128) /* max number of sectors on one chip */
#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
#endif /* CONFIG_DBAU1550 */
#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
#endif /* CONFIG_DBAU1550 */
-#define C
FG
_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
+#define C
ONFIG_SYS
_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
-#define C
FG
_FLASH_CFI 1
-#define C
F
G_FLASH_CFI_DRIVER 1
+#define C
ONFIG_SYS
_FLASH_CFI 1
+#define C
ONFI
G_FLASH_CFI_DRIVER 1
/* The following #defines are needed to get flash environment right */
/* The following #defines are needed to get flash environment right */
-#define C
FG_MONITOR_BASE
TEXT_BASE
-#define C
FG_MONITOR_LEN
(192 << 10)
+#define C
ONFIG_SYS_MONITOR_BASE
TEXT_BASE
+#define C
ONFIG_SYS_MONITOR_LEN
(192 << 10)
-#define C
FG_INIT_SP_OFFSET
0x400000
+#define C
ONFIG_SYS_INIT_SP_OFFSET
0x400000
/* We boot from this flash, selected with dip switch */
/* We boot from this flash, selected with dip switch */
-#define C
FG_FLASH_BASE
PHYS_FLASH_2
+#define C
ONFIG_SYS_FLASH_BASE
PHYS_FLASH_2
/* timeout values are in ticks */
/* timeout values are in ticks */
-#define C
FG_FLASH_ERASE_TOUT (2 * CFG
_HZ) /* Timeout for Flash Erase */
-#define C
FG_FLASH_WRITE_TOUT (2 * CFG
_HZ) /* Timeout for Flash Write */
+#define C
ONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS
_HZ) /* Timeout for Flash Erase */
+#define C
ONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS
_HZ) /* Timeout for Flash Write */
-#define C
FG_ENV_IS_NOWHERE
1
+#define C
ONFIG_ENV_IS_NOWHERE
1
/* Address and size of Primary Environment Sector */
/* Address and size of Primary Environment Sector */
-#define C
FG_ENV_ADDR
0xB0030000
-#define C
FG_ENV_SIZE
0x10000
+#define C
ONFIG_ENV_ADDR
0xB0030000
+#define C
ONFIG_ENV_SIZE
0x10000
#define CONFIG_FLASH_16BIT
#define CONFIG_FLASH_16BIT
@@
-209,8
+220,8
@@
#ifndef CONFIG_DBAU1550
/*---ATA PCMCIA ------------------------------------*/
#ifndef CONFIG_DBAU1550
/*---ATA PCMCIA ------------------------------------*/
-#define C
FG
_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
-#define C
FG
_PCMCIA_MEM_ADDR 0x20000000
+#define C
ONFIG_SYS
_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
+#define C
ONFIG_SYS
_PCMCIA_MEM_ADDR 0x20000000
#define CONFIG_PCMCIA_SLOT_A
#define CONFIG_ATAPI 1
#define CONFIG_PCMCIA_SLOT_A
#define CONFIG_ATAPI 1
@@
-220,31
+231,31
@@
#define CONFIG_IDE_PCMCIA 1
/* We only support one slot for now */
#define CONFIG_IDE_PCMCIA 1
/* We only support one slot for now */
-#define C
FG_IDE_MAXBUS
1 /* max. 1 IDE bus */
-#define C
FG_IDE_MAXDEVICE
1 /* max. 1 drive per IDE bus */
+#define C
ONFIG_SYS_IDE_MAXBUS
1 /* max. 1 IDE bus */
+#define C
ONFIG_SYS_IDE_MAXDEVICE
1 /* max. 1 drive per IDE bus */
#undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
#undef CONFIG_IDE_LED /* LED for ide not supported */
#undef CONFIG_IDE_RESET /* reset for ide not supported */
-#define C
FG_ATA_IDE0_OFFSET
0x0000
+#define C
ONFIG_SYS_ATA_IDE0_OFFSET
0x0000
-#define C
FG_ATA_BASE_ADDR CFG
_PCMCIA_MEM_ADDR
+#define C
ONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS
_PCMCIA_MEM_ADDR
/* Offset for data I/O */
/* Offset for data I/O */
-#define C
FG
_ATA_DATA_OFFSET 8
+#define C
ONFIG_SYS
_ATA_DATA_OFFSET 8
/* Offset for normal register accesses */
/* Offset for normal register accesses */
-#define C
FG
_ATA_REG_OFFSET 0
+#define C
ONFIG_SYS
_ATA_REG_OFFSET 0
/* Offset for alternate registers */
/* Offset for alternate registers */
-#define C
FG
_ATA_ALT_OFFSET 0x0100
+#define C
ONFIG_SYS
_ATA_ALT_OFFSET 0x0100
#endif /* CONFIG_DBAU1550 */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#endif /* CONFIG_DBAU1550 */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define C
FG_DCACHE_SIZE
16384
-#define C
FG_ICACHE_SIZE
16384
-#define C
FG_CACHELINE_SIZE
32
+#define C
ONFIG_SYS_DCACHE_SIZE
16384
+#define C
ONFIG_SYS_ICACHE_SIZE
16384
+#define C
ONFIG_SYS_CACHELINE_SIZE
32
#endif /* __CONFIG_H */
#endif /* __CONFIG_H */