#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */
#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define CONFIG_STACKSIZE (256*1024) /* regular stack */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_OFFSET (512 << 10)
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_OFFSET (512 << 10)
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_CLE_MASK 0x10
#define CONFIG_SYS_ALE_MASK 0x8
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CONFIG_SYS_CLE_MASK 0x10
#define CONFIG_SYS_ALE_MASK 0x8
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */