projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
configs: at91sam9m10g45ek: Update to support DM/DT
[oweals/u-boot.git]
/
include
/
configs
/
T4240QDS.h
diff --git
a/include/configs/T4240QDS.h
b/include/configs/T4240QDS.h
index 6ba2a03f0c1deb3842da52e74fef63e2c78ff74a..9d4baaa79fc1a0990a82db4ab0af76e59b92d475 100644
(file)
--- a/
include/configs/T4240QDS.h
+++ b/
include/configs/T4240QDS.h
@@
-10,11
+10,8
@@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_T4240QDS
-
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4
-#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
@@
-26,7
+23,6
@@
#else
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
#else
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-#define CONFIG_FSL_LAW /* Use common FSL init code */
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
#define CONFIG_SPL_PAD_TO 0x40000
#define CONFIG_SYS_TEXT_BASE 0x00201000
#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
#define CONFIG_SPL_PAD_TO 0x40000
@@
-63,7
+59,6
@@
#define CONFIG_SPL_SKIP_RELOCATE
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
#define CONFIG_SPL_SKIP_RELOCATE
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#define CONFIG_SYS_NO_FLASH
#endif
#endif
#endif
#endif
@@
-75,7
+70,6
@@
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \
(0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_NO_FLASH
#endif
#define CONFIG_SRIO_PCIE_BOOT_MASTER
#endif
#define CONFIG_SRIO_PCIE_BOOT_MASTER
@@
-83,7
+77,7
@@
#include "t4qds.h"
#include "t4qds.h"
-#if
def CONFIG_SYS_NO
_FLASH
+#if
ndef CONFIG_MTD_NOR
_FLASH
#if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_ENV_IS_NOWHERE
#endif
#if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL)
#define CONFIG_ENV_IS_NOWHERE
#endif
@@
-496,7
+490,6
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_LBA48
#define CONFIG_CMD_SATA
#define CONFIG_LBA48
#define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
#endif
#ifdef CONFIG_FMAN_ENET
#endif
#ifdef CONFIG_FMAN_ENET
@@
-519,14
+512,10
@@
unsigned long get_board_ddr_clk(void);
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_HAS_FSL_DR_USB
-#define CONFIG_MMC
-
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_ESDHC_DETECT_QUIRK \
(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_ESDHC_DETECT_QUIRK \
(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
@@
-544,7
+533,7
@@
unsigned long get_board_ddr_clk(void);
* interleaving. It can be cacheline, page, bank, superbank.
* See doc/README.fsl-ddr for details.
*/
* interleaving. It can be cacheline, page, bank, superbank.
* See doc/README.fsl-ddr for details.
*/
-#ifdef CONFIG_
PPC
_T4240
+#ifdef CONFIG_
ARCH
_T4240
#define CTRL_INTLV_PREFERED 3way_4KB
#else
#define CTRL_INTLV_PREFERED cacheline
#define CTRL_INTLV_PREFERED 3way_4KB
#else
#define CTRL_INTLV_PREFERED cacheline