+#define CFG_DDR_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
+#define CONFIG_VERY_BIG_RAM
+
+#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_DIMM_SLOTS_PER_CTLR 1
+#define CONFIG_CHIP_SELECTS_PER_CTRL 2
+
+/* I2C addresses of SPD EEPROMs */
+#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */