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ppc/85xx: Clean up immap_85xx.h
[oweals/u-boot.git]
/
include
/
asm-ppc
/
fsl_ddr_dimm_params.h
diff --git
a/include/asm-ppc/fsl_ddr_dimm_params.h
b/include/asm-ppc/fsl_ddr_dimm_params.h
index c794eedfe421bafab2f3caae7408eef7a705d647..55923e09b3a315d25beb2b491b96589c0dcac984 100644
(file)
--- a/
include/asm-ppc/fsl_ddr_dimm_params.h
+++ b/
include/asm-ppc/fsl_ddr_dimm_params.h
@@
-33,9
+33,15
@@
typedef struct dimm_params_s {
/* used in computing base address of DIMMs */
unsigned long long base_address;
/* used in computing base address of DIMMs */
unsigned long long base_address;
+ /* mirrored DIMMs */
+ unsigned int mirrored_dimm; /* only for ddr3 */
/* DIMM timing parameters */
/* DIMM timing parameters */
+ unsigned int mtb_ps; /* medium timebase ps, only for ddr3 */
+ unsigned int tAA_ps; /* minimum CAS latency time, only for ddr3 */
+ unsigned int tFAW_ps; /* four active window delay, only for ddr3 */
+
/*
* SDRAM clock periods
* The range for these are 1000-10000 so a short should be sufficient
/*
* SDRAM clock periods
* The range for these are 1000-10000 so a short should be sufficient
@@
-67,6
+73,7
@@
typedef struct dimm_params_s {
unsigned int refresh_rate_ps;
unsigned int refresh_rate_ps;
+ /* DDR3 doesn't need these as below */
unsigned int tIS_ps; /* byte 32, spd->ca_setup */
unsigned int tIH_ps; /* byte 33, spd->ca_hold */
unsigned int tDS_ps; /* byte 34, spd->data_setup */
unsigned int tIS_ps; /* byte 32, spd->ca_setup */
unsigned int tIH_ps; /* byte 33, spd->ca_hold */
unsigned int tDS_ps; /* byte 34, spd->data_setup */