- temp =
- *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset +
- I2C_CNTRL2);
-
- if (0 ==
- (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START)))
- {
- if (0 ==
- (temp &
+ temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2);
+
+ if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) {
+ if (0 == (temp &
/* Check for valid I2C address */
if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
while (len--) {
/* Check for valid I2C address */
if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) {
while (len--) {
- op_status =
- i2c_read_byte(i2c_if, chip_addr, byte_addr++,
- buffer++);
+ op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++);
if (TSI108_I2C_SUCCESS != op_status) {
DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
if (TSI108_I2C_SUCCESS != op_status) {
DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len));
/* Check if I2C operation is in progress */
temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
/* Check if I2C operation is in progress */
temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
/* Place data into the I2C Tx Register */
*(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
I2C_TX_DATA) = (u32) * buffer;
/* Place data into the I2C Tx Register */
*(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
I2C_TX_DATA) = (u32) * buffer;
/* Issue the write command (at this moment all other parameters
* are 0 (size = 1 byte, lane = 0)
*/
/* Issue the write command (at this moment all other parameters
* are 0 (size = 1 byte, lane = 0)
*/
- temp =
- *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET +
- I2C_CNTRL2);
-
- if (0 ==
- (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START)))
- {
- if (0 ==
- (temp &
+ temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2);
+
+ if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) {
+ if (0 == (temp &
return i2c_read (chip, 0, 1, (char *)&tmp, 1);
}
return i2c_read (chip, 0, 1, (char *)&tmp, 1);
}