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Synchronize with U-BOOT mainline
[oweals/u-boot.git]
/
drivers
/
tsec.h
diff --git
a/drivers/tsec.h
b/drivers/tsec.h
index 4aa331c458b99b4985b191b2cc467de9fa95c35c..2f0092ad59888d6502ca245a0da5634b940f558d 100644
(file)
--- a/
drivers/tsec.h
+++ b/
drivers/tsec.h
@@
-7,7
+7,7
@@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright 2004
Freescale Semiconductor
.
+ * Copyright 2004
, 2007 Freescale Semiconductor, Inc
.
* (C) Copyright 2003, Motorola, Inc.
* maintained by Xianghua Xiao (x.xiao@motorola.com)
* author Andy Fleming
* (C) Copyright 2003, Motorola, Inc.
* maintained by Xianghua Xiao (x.xiao@motorola.com)
* author Andy Fleming
@@
-30,7
+30,7
@@
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
#define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET)
#elif defined(CONFIG_MPC83XX)
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
#define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET)
#elif defined(CONFIG_MPC83XX)
- #define TSEC_BASE_ADDR (CFG_IMMR
BAR
+ CFG_TSEC1_OFFSET)
+ #define TSEC_BASE_ADDR (CFG_IMMR + CFG_TSEC1_OFFSET)
#endif
#endif
@@
-65,11
+65,14
@@
#define ECNTRL_INIT_SETTINGS 0x00001000
#define ECNTRL_TBI_MODE 0x00000020
#define ECNTRL_R100 0x00000008
#define ECNTRL_INIT_SETTINGS 0x00001000
#define ECNTRL_TBI_MODE 0x00000020
#define ECNTRL_R100 0x00000008
+#define ECNTRL_SGMII_MODE 0x00000002
#define miim_end -2
#define miim_read -1
#define miim_end -2
#define miim_read -1
-#define TBIPA_VALUE 0x1f
+#ifndef CFG_TBIPA_VALUE
+ #define CFG_TBIPA_VALUE 0x1f
+#endif
#define MIIMCFG_INIT_VALUE 0x00000003
#define MIIMCFG_RESET 0x80000000
#define MIIMCFG_INIT_VALUE 0x00000003
#define MIIMCFG_RESET 0x80000000
@@
-109,6
+112,11
@@
#define MIIM_GBIT_CONTROL 0x9
#define MIIM_GBIT_CONTROL_INIT 0xe00
#define MIIM_GBIT_CONTROL 0x9
#define MIIM_GBIT_CONTROL_INIT 0xe00
+/* Broadcom BCM54xx -- taken from linux sungem_phy */
+#define MIIM_BCM54xx_AUXSTATUS 0x19
+#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK 0x0700
+#define MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT 8
+
/* Cicada Auxiliary Control/Status Register */
#define MIIM_CIS8201_AUX_CONSTAT 0x1c
#define MIIM_CIS8201_AUXCONSTAT_INIT 0x0004
/* Cicada Auxiliary Control/Status Register */
#define MIIM_CIS8201_AUX_CONSTAT 0x1c
#define MIIM_CIS8201_AUXCONSTAT_INIT 0x0004