+
+static int ich_spi_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ich_spi_platdata *plat = dev_get_platdata(dev);
+ int node = dev_of_offset(dev);
+ int ret;
+
+ ret = fdt_node_check_compatible(gd->fdt_blob, node, "intel,ich7-spi");
+ if (ret == 0) {
+ plat->ich_version = ICHV_7;
+ } else {
+ ret = fdt_node_check_compatible(gd->fdt_blob, node,
+ "intel,ich9-spi");
+ if (ret == 0)
+ plat->ich_version = ICHV_9;
+ }
+
+ plat->lockdown = fdtdec_get_bool(gd->fdt_blob, node,
+ "intel,spi-lock-down");
+
+ return ret;
+}
+
+static const struct dm_spi_ops ich_spi_ops = {
+ .xfer = ich_spi_xfer,
+ .set_speed = ich_spi_set_speed,
+ .set_mode = ich_spi_set_mode,
+ /*
+ * cs_info is not needed, since we require all chip selects to be
+ * in the device tree explicitly
+ */
+};
+
+static const struct udevice_id ich_spi_ids[] = {
+ { .compatible = "intel,ich7-spi" },
+ { .compatible = "intel,ich9-spi" },
+ { }
+};
+
+U_BOOT_DRIVER(ich_spi) = {
+ .name = "ich_spi",
+ .id = UCLASS_SPI,
+ .of_match = ich_spi_ids,
+ .ops = &ich_spi_ops,
+ .ofdata_to_platdata = ich_spi_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct ich_spi_platdata),
+ .priv_auto_alloc_size = sizeof(struct ich_spi_priv),
+ .child_pre_probe = ich_spi_child_pre_probe,
+ .probe = ich_spi_probe,
+ .remove = ich_spi_remove,
+ .flags = DM_FLAG_OS_PREPARE,
+};