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spi: xilinx_spi: Fix to configure CPOL, CPHA mask
[oweals/u-boot.git]
/
drivers
/
spi
/
bfin_spi6xx.c
diff --git
a/drivers/spi/bfin_spi6xx.c
b/drivers/spi/bfin_spi6xx.c
index fde3447426770eb78f549d3d5484e1c2f04fbd92..eba01d16f50d7d6f095cf87625624a7b33fd1ef7 100644
(file)
--- a/
drivers/spi/bfin_spi6xx.c
+++ b/
drivers/spi/bfin_spi6xx.c
@@
-22,6
+22,7
@@
#include <spi.h>
#include <asm/blackfin.h>
#include <spi.h>
#include <asm/blackfin.h>
+#include <asm/clock.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/spi6xx.h>
#include <asm/gpio.h>
#include <asm/portmux.h>
#include <asm/mach-common/bits/spi6xx.h>
@@
-135,11
+136,11
@@
static const unsigned short cs_pins[][7] = {
void spi_set_speed(struct spi_slave *slave, uint hz)
{
struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
void spi_set_speed(struct spi_slave *slave, uint hz)
{
struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
- ulong
s
clk;
+ ulong clk;
u32 clock;
u32 clock;
-
sclk = get_sclk1
();
- clock =
s
clk / hz;
+
clk = get_spi_clk
();
+ clock = clk / hz;
if (clock)
clock--;
bss->clock = clock;
if (clock)
clock--;
bss->clock = clock;
@@
-154,10
+155,6
@@
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
if (!spi_cs_is_valid(bus, cs))
return NULL;
if (!spi_cs_is_valid(bus, cs))
return NULL;
- if (bus >= ARRAY_SIZE(pins) || pins[bus] == NULL) {
- debug("%s: invalid bus %u\n", __func__, bus);
- return NULL;
- }
switch (bus) {
#ifdef SPI0_REGBASE
case 0:
switch (bus) {
#ifdef SPI0_REGBASE
case 0:
@@
-175,15
+172,14
@@
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
break;
#endif
default:
break;
#endif
default:
+ debug("%s: invalid bus %u\n", __func__, bus);
return NULL;
}
return NULL;
}
- bss =
malloc(sizeof(*bss)
);
+ bss =
spi_alloc_slave(struct bfin_spi_slave, bus, cs
);
if (!bss)
return NULL;
if (!bss)
return NULL;
- bss->slave.bus = bus;
- bss->slave.cs = cs;
bss->regs = (struct bfin_spi_regs *)reg_base;
bss->control = SPI_CTL_EN | SPI_CTL_MSTR;
if (mode & SPI_CPHA)
bss->regs = (struct bfin_spi_regs *)reg_base;
bss->control = SPI_CTL_EN | SPI_CTL_MSTR;
if (mode & SPI_CPHA)