+
+static int altera_spi_set_speed(struct udevice *bus, uint speed)
+{
+ return 0;
+}
+
+static int altera_spi_set_mode(struct udevice *bus, uint mode)
+{
+ return 0;
+}
+
+static int altera_spi_probe(struct udevice *bus)
+{
+ struct altera_spi_platdata *plat = dev_get_platdata(bus);
+ struct altera_spi_priv *priv = dev_get_priv(bus);
+
+ priv->regs = plat->regs;
+
+ return 0;
+}
+
+static int altera_spi_ofdata_to_platdata(struct udevice *bus)
+{
+ struct altera_spi_platdata *plat = dev_get_platdata(bus);
+
+ plat->regs = map_physmem(dev_get_addr(bus),
+ sizeof(struct altera_spi_regs),
+ MAP_NOCACHE);
+
+ return 0;
+}
+
+static const struct dm_spi_ops altera_spi_ops = {
+ .claim_bus = altera_spi_claim_bus,
+ .release_bus = altera_spi_release_bus,
+ .xfer = altera_spi_xfer,
+ .set_speed = altera_spi_set_speed,
+ .set_mode = altera_spi_set_mode,
+ /*
+ * cs_info is not needed, since we require all chip selects to be
+ * in the device tree explicitly
+ */
+};
+
+static const struct udevice_id altera_spi_ids[] = {
+ { .compatible = "altr,spi-1.0" },
+ {}
+};
+
+U_BOOT_DRIVER(altera_spi) = {
+ .name = "altera_spi",
+ .id = UCLASS_SPI,
+ .of_match = altera_spi_ids,
+ .ops = &altera_spi_ops,
+ .ofdata_to_platdata = altera_spi_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct altera_spi_platdata),
+ .priv_auto_alloc_size = sizeof(struct altera_spi_priv),
+ .probe = altera_spi_probe,
+};