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drivers/pcmcia: add missing i82365
[oweals/u-boot.git]
/
drivers
/
net
/
mcffec.c
diff --git
a/drivers/net/mcffec.c
b/drivers/net/mcffec.c
index 609210de19e0cea738df8846825a766b34c05a57..71d19608edeb8c93af200240126ee8197a546343 100644
(file)
--- a/
drivers/net/mcffec.c
+++ b/
drivers/net/mcffec.c
@@
-27,15
+27,15
@@
#include <common.h>
#include <malloc.h>
#include <common.h>
#include <malloc.h>
+#ifdef CONFIG_MCFFEC
+
#include <asm/fec.h>
#include <asm/immap.h>
#include <command.h>
#include <asm/fec.h>
#include <asm/immap.h>
#include <command.h>
-#include <config.h>
#include <net.h>
#include <miiphy.h>
#include <net.h>
#include <miiphy.h>
-#ifdef CONFIG_MCFFEC
#undef ET_DEBUG
#undef MII_DEBUG
#undef ET_DEBUG
#undef MII_DEBUG
@@
-51,7
+51,7
@@
DECLARE_GLOBAL_DATA_PTR;
DECLARE_GLOBAL_DATA_PTR;
-#if
(CONFIG_COMMANDS & CF
G_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if
defined(CONFI
G_CMD_NET) && defined(CONFIG_NET_MULTI)
struct fec_info_s fec_info[] = {
#ifdef CFG_FEC0_IOBASE
struct fec_info_s fec_info[] = {
#ifdef CFG_FEC0_IOBASE
@@
-101,7
+101,7
@@
void fec_reset(struct eth_device *dev);
extern int fecpin_setclear(struct eth_device *dev, int setclear);
#ifdef CFG_DISCOVER_PHY
extern int fecpin_setclear(struct eth_device *dev, int setclear);
#ifdef CFG_DISCOVER_PHY
-extern void mii_init(void);
+extern void
__
mii_init(void);
extern uint mii_send(uint mii_cmd);
extern int mii_discover_phy(struct eth_device *dev);
extern int mcffec_miiphy_read(char *devname, unsigned char addr,
extern uint mii_send(uint mii_cmd);
extern int mii_discover_phy(struct eth_device *dev);
extern int mcffec_miiphy_read(char *devname, unsigned char addr,
@@
-150,23
+150,15
@@
int fec_send(struct eth_device *dev, volatile void *packet, int length)
* Wait for ready
*/
j = 0;
* Wait for ready
*/
j = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX not ready\n");
}
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX not ready\n");
}
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
+
info->txbd[info->txIdx].cbd_bufaddr = (uint) packet;
info->txbd[info->txIdx].cbd_datlen = length;
info->txbd[info->txIdx].cbd_sc |= BD_ENET_TX_RDY_LST;
info->txbd[info->txIdx].cbd_bufaddr = (uint) packet;
info->txbd[info->txIdx].cbd_datlen = length;
info->txbd[info->txIdx].cbd_sc |= BD_ENET_TX_RDY_LST;
@@
-174,21
+166,26
@@
int fec_send(struct eth_device *dev, volatile void *packet, int length)
/* Activate transmit Buffer Descriptor polling */
fecp->tdar = 0x01000000; /* Descriptor polling active */
/* Activate transmit Buffer Descriptor polling */
fecp->tdar = 0x01000000; /* Descriptor polling active */
- j = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+ /* FEC fix for MCF5275, FEC unable to initial transmit data packet.
+ * A nop will ensure the descriptor polling active completed.
+ */
+#ifdef CONFIG_M5275
+ __asm__ ("nop");
+#endif
+
+#ifdef CFG_UNIFY_CACHE
icache_invalid();
#endif
icache_invalid();
#endif
+ j = 0;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
(j < MCFFEC_TOUT_LOOP)) {
udelay(1);
j++;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX timeout\n");
}
}
if (j >= MCFFEC_TOUT_LOOP) {
printf("TX timeout\n");
}
+
#ifdef ET_DEBUG
printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
__FILE__, __LINE__, __FUNCTION__, j,
#ifdef ET_DEBUG
printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
__FILE__, __LINE__, __FUNCTION__, j,
@@
-196,10
+193,7
@@
int fec_send(struct eth_device *dev, volatile void *packet, int length)
(info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2);
#endif
(info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2);
#endif
- /* return only status bits */ ;
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
- icache_invalid();
-#endif
+ /* return only status bits */
rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS);
info->txIdx = (info->txIdx + 1) % TX_BUF_CNT;
rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS);
info->txIdx = (info->txIdx + 1) % TX_BUF_CNT;
@@
-213,6
+207,9
@@
int fec_recv(struct eth_device *dev)
int length;
for (;;) {
int length;
for (;;) {
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
/* section 16.9.23.2 */
if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
length = -1;
/* section 16.9.23.2 */
if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
length = -1;
@@
-420,7
+417,7
@@
int fec_init(struct eth_device *dev, bd_t * bd)
fec_reset(dev);
fec_reset(dev);
-#if
(CONFIG_COMMANDS & CF
G_CMD_MII) || defined (CONFIG_MII) || \
+#if
defined(CONFI
G_CMD_MII) || defined (CONFIG_MII) || \
defined (CFG_DISCOVER_PHY)
mii_init();
defined (CFG_DISCOVER_PHY)
mii_init();
@@
-430,7
+427,7
@@
int fec_init(struct eth_device *dev, bd_t * bd)
#ifndef CFG_DISCOVER_PHY
setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED);
#endif /* ifndef CFG_DISCOVER_PHY */
#ifndef CFG_DISCOVER_PHY
setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED);
#endif /* ifndef CFG_DISCOVER_PHY */
-#endif /* C
F
G_CMD_MII || CONFIG_MII */
+#endif /* C
ONFI
G_CMD_MII || CONFIG_MII */
/* We use strictly polling mode only */
fecp->eimr = 0;
/* We use strictly polling mode only */
fecp->eimr = 0;
@@
-440,20
+437,33
@@
int fec_init(struct eth_device *dev, bd_t * bd)
/* Set station address */
if ((u32) fecp == CFG_FEC0_IOBASE) {
/* Set station address */
if ((u32) fecp == CFG_FEC0_IOBASE) {
+#ifdef CFG_FEC1_IOBASE
+ volatile fec_t *fecp1 = (fec_t *) (CFG_FEC1_IOBASE);
+ ea = &bd->bi_enet1addr[0];
+ fecp1->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp1->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
ea = &bd->bi_enetaddr[0];
ea = &bd->bi_enetaddr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
} else {
} else {
+#ifdef CFG_FEC0_IOBASE
+ volatile fec_t *fecp0 = (fec_t *) (CFG_FEC0_IOBASE);
+ ea = &bd->bi_enetaddr[0];
+ fecp0->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp0->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
#ifdef CFG_FEC1_IOBASE
ea = &bd->bi_enet1addr[0];
#ifdef CFG_FEC1_IOBASE
ea = &bd->bi_enet1addr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
#endif
}
#endif
}
- fecp->palr = (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
- fecp->paur = (ea[4] << 24) | (ea[5] << 16);
-#ifdef ET_DEBUG
- printf("Eth Addrs: %02x:%02x:%02x:%02x:%02x:%02x\n",
- ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]);
-#endif
-
/* Clear unicast address hash table */
fecp->iaur = 0;
fecp->ialr = 0;
/* Clear unicast address hash table */
fecp->iaur = 0;
fecp->ialr = 0;
@@
-578,7
+588,7
@@
int mcffec_initialize(bd_t * bis)
eth_register(dev);
eth_register(dev);
-#if defined(CONFIG_MII) ||
(CONFIG_COMMANDS & CF
G_CMD_MII)
+#if defined(CONFIG_MII) ||
defined(CONFI
G_CMD_MII)
miiphy_register(dev->name,
mcffec_miiphy_read, mcffec_miiphy_write);
#endif
miiphy_register(dev->name,
mcffec_miiphy_read, mcffec_miiphy_write);
#endif
@@
-590,5
+600,5
@@
int mcffec_initialize(bd_t * bis)
return 1;
}
return 1;
}
-#endif /* C
F
G_CMD_NET, FEC_ENET & NET_MULTI */
+#endif /* C
ONFI
G_CMD_NET, FEC_ENET & NET_MULTI */
#endif /* CONFIG_MCFFEC */
#endif /* CONFIG_MCFFEC */