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Merge git://git.denx.de/u-boot-dm
[oweals/u-boot.git]
/
drivers
/
net
/
lpc32xx_eth.c
diff --git
a/drivers/net/lpc32xx_eth.c
b/drivers/net/lpc32xx_eth.c
index f883a254c40693ffdd2622be094a56660d109b25..6cc273c33c81f046b1ce4f555d590213eddaa77a 100644
(file)
--- a/
drivers/net/lpc32xx_eth.c
+++ b/
drivers/net/lpc32xx_eth.c
@@
-168,6
+168,7
@@
struct lpc32xx_eth_registers {
#define COMMAND_RXENABLE 0x00000001
#define COMMAND_TXENABLE 0x00000002
#define COMMAND_PASSRUNTFRAME 0x00000040
#define COMMAND_RXENABLE 0x00000001
#define COMMAND_TXENABLE 0x00000002
#define COMMAND_PASSRUNTFRAME 0x00000040
+#define COMMAND_RMII 0x00000200
#define COMMAND_FULL_DUPLEX 0x00000400
/* Helper: general reset */
#define COMMAND_RESETS 0x00000038
#define COMMAND_FULL_DUPLEX 0x00000400
/* Helper: general reset */
#define COMMAND_RESETS 0x00000038
@@
-201,6
+202,7
@@
struct lpc32xx_eth_device {
struct eth_device dev;
struct lpc32xx_eth_registers *regs;
struct lpc32xx_eth_buffers *bufs;
struct eth_device dev;
struct lpc32xx_eth_registers *regs;
struct lpc32xx_eth_buffers *bufs;
+ bool phy_rmii;
};
#define LPC32XX_ETH_DEVICE_SIZE (sizeof(struct lpc32xx_eth_device))
};
#define LPC32XX_ETH_DEVICE_SIZE (sizeof(struct lpc32xx_eth_device))
@@
-302,6
+304,13
@@
static int mii_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
return -EFAULT;
}
return -EFAULT;
}
+ /* write the phy and reg addressse into the MII address reg */
+ writel((phy_adr << MADR_PHY_OFFSET) | (reg_ofs << MADR_REG_OFFSET),
+ ®s->madr);
+
+ /* write data to the MII write register */
+ writel(data, ®s->mwtd);
+
/* wait till the MII is not busy */
timeout = MII_TIMEOUT;
do {
/* wait till the MII is not busy */
timeout = MII_TIMEOUT;
do {
@@
-317,13
+326,6
@@
static int mii_reg_write(const char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
return -EFAULT;
}
return -EFAULT;
}
- /* write the phy and reg addressse into the MII address reg */
- writel((phy_adr << MADR_PHY_OFFSET) | (reg_ofs << MADR_REG_OFFSET),
- ®s->madr);
-
- /* write data to the MII write register */
- writel(data, ®s->mwtd);
-
/*debug("%s:(adr %d, off %d) <= %04x\n", __func__, phy_adr,
reg_ofs, data);*/
/*debug("%s:(adr %d, off %d) <= %04x\n", __func__, phy_adr,
reg_ofs, data);*/
@@
-351,15
+353,20
@@
int lpc32xx_eth_phy_write(struct mii_dev *bus, int phy_addr, int dev_addr,
#endif
/*
#endif
/*
+ * Provide default Ethernet buffers base address if target did not.
* Locate buffers in SRAM at 0x00001000 to avoid cache issues and
* maximize throughput.
*/
* Locate buffers in SRAM at 0x00001000 to avoid cache issues and
* maximize throughput.
*/
-
-#define LPC32XX_ETH_BUFS 0x00001000
+#if !defined(CONFIG_LPC32XX_ETH_BUFS_BASE)
+#define CONFIG_LPC32XX_ETH_BUFS_BASE 0x00001000
+#endif
static struct lpc32xx_eth_device lpc32xx_eth = {
.regs = (struct lpc32xx_eth_registers *)LPC32XX_ETH_BASE,
static struct lpc32xx_eth_device lpc32xx_eth = {
.regs = (struct lpc32xx_eth_registers *)LPC32XX_ETH_BASE,
- .bufs = (struct lpc32xx_eth_buffers *)LPC32XX_ETH_BUFS
+ .bufs = (struct lpc32xx_eth_buffers *)CONFIG_LPC32XX_ETH_BUFS_BASE,
+#if defined(CONFIG_RMII)
+ .phy_rmii = true,
+#endif
};
#define TX_TIMEOUT 10000
};
#define TX_TIMEOUT 10000
@@
-471,7
+478,10
@@
static int lpc32xx_eth_init(struct eth_device *dev)
writel(0x0012, ®s->ipgr);
/* pass runt (smaller than 64 bytes) frames */
writel(0x0012, ®s->ipgr);
/* pass runt (smaller than 64 bytes) frames */
- writel(COMMAND_PASSRUNTFRAME, ®s->command);
+ if (lpc32xx_eth_device->phy_rmii)
+ writel(COMMAND_PASSRUNTFRAME | COMMAND_RMII, ®s->command);
+ else
+ writel(COMMAND_PASSRUNTFRAME, ®s->command);
/* Configure Full/Half Duplex mode */
if (miiphy_duplex(dev->name, CONFIG_PHY_ADDR) == FULL) {
/* Configure Full/Half Duplex mode */
if (miiphy_duplex(dev->name, CONFIG_PHY_ADDR) == FULL) {
@@
-559,6
+569,8
@@
static int lpc32xx_eth_halt(struct eth_device *dev)
#if defined(CONFIG_PHYLIB)
int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
{
#if defined(CONFIG_PHYLIB)
int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
{
+ struct lpc32xx_eth_device *lpc32xx_eth_device =
+ container_of(dev, struct lpc32xx_eth_device, dev);
struct mii_dev *bus;
struct phy_device *phydev;
int ret;
struct mii_dev *bus;
struct phy_device *phydev;
int ret;
@@
-570,7
+582,7
@@
int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
}
bus->read = lpc32xx_eth_phy_read;
bus->write = lpc32xx_eth_phy_write;
}
bus->read = lpc32xx_eth_phy_read;
bus->write = lpc32xx_eth_phy_write;
- s
printf
(bus->name, dev->name);
+ s
trcpy
(bus->name, dev->name);
ret = mdio_register(bus);
if (ret) {
ret = mdio_register(bus);
if (ret) {
@@
-579,7
+591,11
@@
int lpc32xx_eth_phylib_init(struct eth_device *dev, int phyid)
return -ENOMEM;
}
return -ENOMEM;
}
- phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
+ if (lpc32xx_eth_device->phy_rmii)
+ phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RMII);
+ else
+ phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_MII);
+
if (!phydev) {
printf("phy_connect failed\n");
return -ENODEV;
if (!phydev) {
printf("phy_connect failed\n");
return -ENODEV;