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net: emaclite: Fix coding style
[oweals/u-boot.git]
/
drivers
/
net
/
inca-ip_sw.c
diff --git
a/drivers/net/inca-ip_sw.c
b/drivers/net/inca-ip_sw.c
index e4aaed6afbc6c1709987c5fbc3226cc0a5487525..bd3360cad7c31b6de2e969969479aba5380af034 100644
(file)
--- a/
drivers/net/inca-ip_sw.c
+++ b/
drivers/net/inca-ip_sw.c
@@
-26,11
+26,9
@@
#include <common.h>
#include <common.h>
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_INCA_IP_SWITCH)
-
#include <malloc.h>
#include <net.h>
#include <malloc.h>
#include <net.h>
+#include <netdev.h>
#include <asm/inca-ip.h>
#include <asm/addrspace.h>
#include <asm/inca-ip.h>
#include <asm/addrspace.h>
@@
-202,7
+200,7
@@
int inca_switch_initialize(bd_t * bis)
printf("Leaving inca_switch_initialize()\n");
#endif
printf("Leaving inca_switch_initialize()\n");
#endif
- return
1
;
+ return
0
;
}
}
@@
-234,7
+232,7
@@
static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Initialize the descriptor rings.
*/
for (i = 0; i < NUM_RX_DESC; i++) {
/* Initialize the descriptor rings.
*/
for (i = 0; i < NUM_RX_DESC; i++) {
- inca_rx_descriptor_t * rx_desc = KSEG1ADDR(&rx_ring[i]);
+ inca_rx_descriptor_t * rx_desc =
(inca_rx_descriptor_t *)C
KSEG1ADDR(&rx_ring[i]);
memset(rx_desc, 0, sizeof(rx_ring[i]));
/* Set maximum size of receive buffer.
memset(rx_desc, 0, sizeof(rx_ring[i]));
/* Set maximum size of receive buffer.
@@
-252,14
+250,14
@@
static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Let the last descriptor point to the first
* one.
*/
/* Let the last descriptor point to the first
* one.
*/
- rx_desc->nextRxDescPtr =
KSEG1ADDR((u32)
rx_ring);
+ rx_desc->nextRxDescPtr =
(u32)CKSEG1ADDR(
rx_ring);
} else {
/* Set the address of the next descriptor.
*/
} else {
/* Set the address of the next descriptor.
*/
- rx_desc->nextRxDescPtr = (u32)KSEG1ADDR(&rx_ring[i+1]);
+ rx_desc->nextRxDescPtr = (u32)
C
KSEG1ADDR(&rx_ring[i+1]);
}
}
- rx_desc->RxDataPtr = (u32)KSEG1ADDR(NetRxPackets[i]);
+ rx_desc->RxDataPtr = (u32)
C
KSEG1ADDR(NetRxPackets[i]);
}
#if 0
}
#if 0
@@
-268,7
+266,7
@@
static int inca_switch_init(struct eth_device *dev, bd_t * bis)
#endif
for (i = 0; i < NUM_TX_DESC; i++) {
#endif
for (i = 0; i < NUM_TX_DESC; i++) {
- inca_tx_descriptor_t * tx_desc = KSEG1ADDR(&tx_ring[i]);
+ inca_tx_descriptor_t * tx_desc =
(inca_tx_descriptor_t *)C
KSEG1ADDR(&tx_ring[i]);
memset(tx_desc, 0, sizeof(tx_ring[i]));
memset(tx_desc, 0, sizeof(tx_ring[i]));
@@
-282,11
+280,11
@@
static int inca_switch_init(struct eth_device *dev, bd_t * bis)
/* Let the last descriptor point to the
* first one.
*/
/* Let the last descriptor point to the
* first one.
*/
- tx_desc->nextTxDescPtr =
KSEG1ADDR((u32)
tx_ring);
+ tx_desc->nextTxDescPtr =
(u32)CKSEG1ADDR(
tx_ring);
} else {
/* Set the address of the next descriptor.
*/
} else {
/* Set the address of the next descriptor.
*/
- tx_desc->nextTxDescPtr = (u32)KSEG1ADDR(&tx_ring[i+1]);
+ tx_desc->nextTxDescPtr = (u32)
C
KSEG1ADDR(&tx_ring[i+1]);
}
}
}
}
@@
-346,7
+344,7
@@
static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
int res = -1;
u32 command;
u32 regValue;
int res = -1;
u32 command;
u32 regValue;
- inca_tx_descriptor_t * tx_desc = KSEG1ADDR(&tx_ring[tx_new]);
+ inca_tx_descriptor_t * tx_desc =
(inca_tx_descriptor_t *)C
KSEG1ADDR(&tx_ring[tx_new]);
#if 0
printf("Entered inca_switch_send()\n");
#if 0
printf("Entered inca_switch_send()\n");
@@
-365,7
+363,7
@@
static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
}
if (tx_old_hold >= 0) {
}
if (tx_old_hold >= 0) {
-
KSEG1ADDR(&tx_ring[tx_old_hold]
)->params.field.HOLD = 1;
+
((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_old_hold])
)->params.field.HOLD = 1;
}
tx_old_hold = tx_hold;
}
tx_old_hold = tx_hold;
@@
-376,7
+374,7
@@
static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
tx_desc->TxDataPtr = (u32)packet;
tx_desc->params.field.NBA = length;
tx_desc->TxDataPtr = (u32)packet;
tx_desc->params.field.NBA = length;
-
KSEG1ADDR(&tx_ring[tx_hold]
)->params.field.HOLD = 0;
+
((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_hold])
)->params.field.HOLD = 0;
tx_hold = tx_new;
tx_new = (tx_new + 1) % NUM_TX_DESC;
tx_hold = tx_new;
tx_new = (tx_new + 1) % NUM_TX_DESC;
@@
-397,7
+395,7
@@
static int inca_switch_send(struct eth_device *dev, volatile void *packet, int l
DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR0, regValue);
#if 1
DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR0, regValue);
#if 1
- for(i = 0;
KSEG1ADDR(&tx_ring[tx_hold]
)->C == 0; i++) {
+ for(i = 0;
((inca_tx_descriptor_t *)CKSEG1ADDR(&tx_ring[tx_hold])
)->C == 0; i++) {
if (i >= TOUT_LOOP) {
printf("%s: tx buffer not ready\n", dev->name);
goto Done;
if (i >= TOUT_LOOP) {
printf("%s: tx buffer not ready\n", dev->name);
goto Done;
@@
-423,7
+421,7
@@
static int inca_switch_recv(struct eth_device *dev)
#endif
for (;;) {
#endif
for (;;) {
- rx_desc = KSEG1ADDR(&rx_ring[rx_new]);
+ rx_desc =
(inca_rx_descriptor_t *)C
KSEG1ADDR(&rx_ring[rx_new]);
if (rx_desc->status.field.C == 0) {
break;
if (rx_desc->status.field.C == 0) {
break;
@@
-456,7
+454,7
@@
static int inca_switch_recv(struct eth_device *dev)
#if 0
printf("Received %d bytes\n", length);
#endif
#if 0
printf("Received %d bytes\n", length);
#endif
- NetReceive((void*)KSEG1ADDR(NetRxPackets[rx_new]), length - 4);
+ NetReceive((void*)
C
KSEG1ADDR(NetRxPackets[rx_new]), length - 4);
} else {
#if 1
printf("Zero length!!!\n");
} else {
#if 1
printf("Zero length!!!\n");
@@
-464,7
+462,7
@@
static int inca_switch_recv(struct eth_device *dev)
}
}
-
KSEG1ADDR(&rx_ring[rx_hold]
)->params.field.HOLD = 0;
+
((inca_rx_descriptor_t *)CKSEG1ADDR(&rx_ring[rx_hold])
)->params.field.HOLD = 0;
rx_hold = rx_new;
rx_hold = rx_new;
@@
-758,7
+756,7
@@
static int inca_amdix(void)
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
- (6 << 16)); /*
PHY_ANER
*/
+ (6 << 16)); /*
MII_EXPANSION
*/
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg6);
} while (phyReg6 & (1 << 31));
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg6);
} while (phyReg6 & (1 << 31));
@@
-771,7
+769,7
@@
static int inca_amdix(void)
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
- (4 << 16)); /*
PHY_ANAR
*/
+ (4 << 16)); /*
MII_ADVERTISE
*/
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg4);
} while (phyReg4 & (1 << 31));
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg4);
} while (phyReg4 & (1 << 31));
@@
-784,7
+782,7
@@
static int inca_amdix(void)
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
(0x1 << 31) | /* RA */
(0x0 << 30) | /* Read */
(0x6 << 21) | /* LAN */
- (5 << 16)); /*
PHY_ANLPAR
*/
+ (5 << 16)); /*
MII_LPA
*/
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg5);
} while (phyReg5 & (1 << 31));
do {
SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg5);
} while (phyReg5 & (1 << 31));
@@
-813,5
+811,3
@@
Fail:
return -1;
}
#endif /* CONFIG_INCA_IP_SWITCH_AMDIX */
return -1;
}
#endif /* CONFIG_INCA_IP_SWITCH_AMDIX */
-
-#endif