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spi: cadence_qspi: Use #define for bits instead of bit shifts
[oweals/u-boot.git]
/
drivers
/
net
/
fsl_mdio.c
diff --git
a/drivers/net/fsl_mdio.c
b/drivers/net/fsl_mdio.c
index d6b181b38604c4dd4133646baf07d641200f7551..bd56166d7b121273e370e578ba4c2a80a432a737 100644
(file)
--- a/
drivers/net/fsl_mdio.c
+++ b/
drivers/net/fsl_mdio.c
@@
-5,12
+5,13
@@
*
* SPDX-License-Identifier: GPL-2.0+
*/
*
* SPDX-License-Identifier: GPL-2.0+
*/
+
#include <common.h>
#include <miiphy.h>
#include <phy.h>
#include <fsl_mdio.h>
#include <asm/io.h>
#include <common.h>
#include <miiphy.h>
#include <phy.h>
#include <fsl_mdio.h>
#include <asm/io.h>
-#include <
asm
/errno.h>
+#include <
linux
/errno.h>
void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,
int dev_addr, int regnum, int value)
void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr,
int dev_addr, int regnum, int value)
@@
-32,8
+33,7
@@
int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr,
int value;
int timeout = 1000000;
int value;
int timeout = 1000000;
- /* Put the address of the phy, and the register
- * number into MIIMADD */
+ /* Put the address of the phy, and the register number into MIIMADD */
out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f));
/* Clear the command register, and wait */
out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f));
/* Clear the command register, and wait */
@@
-104,7
+104,7
@@
int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info)
bus->read = tsec_phy_read;
bus->write = tsec_phy_write;
bus->reset = fsl_pq_mdio_reset;
bus->read = tsec_phy_read;
bus->write = tsec_phy_write;
bus->reset = fsl_pq_mdio_reset;
- s
printf
(bus->name, info->name);
+ s
trcpy
(bus->name, info->name);
bus->priv = (void *)info->regs;
bus->priv = (void *)info->regs;