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Merge git://git.denx.de/u-boot-marvell
[oweals/u-boot.git]
/
drivers
/
mtd
/
nand
/
s3c2410_nand.c
diff --git
a/drivers/mtd/nand/s3c2410_nand.c
b/drivers/mtd/nand/s3c2410_nand.c
index db87d07269b0bbe46911144f03edb101e95aded1..b3a2a60bb268f26740b60fc968af6870405e2ceb 100644
(file)
--- a/
drivers/mtd/nand/s3c2410_nand.c
+++ b/
drivers/mtd/nand/s3c2410_nand.c
@@
-38,10
+38,10
@@
static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
}
#endif
}
#endif
-static void s3c24
1
0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+static void s3c24
x
0_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
{
struct nand_chip *chip = mtd->priv;
- struct s3c24
10_nand *nand = s3c241
0_get_base_nand();
+ struct s3c24
x0_nand *nand = s3c24x
0_get_base_nand();
debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
@@
-67,35
+67,35
@@
static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
writeb(cmd, chip->IO_ADDR_W);
}
writeb(cmd, chip->IO_ADDR_W);
}
-static int s3c24
1
0_dev_ready(struct mtd_info *mtd)
+static int s3c24
x
0_dev_ready(struct mtd_info *mtd)
{
{
- struct s3c24
10_nand *nand = s3c241
0_get_base_nand();
+ struct s3c24
x0_nand *nand = s3c24x
0_get_base_nand();
debug("dev_ready\n");
return readl(&nand->nfstat) & 0x01;
}
#ifdef CONFIG_S3C2410_NAND_HWECC
debug("dev_ready\n");
return readl(&nand->nfstat) & 0x01;
}
#ifdef CONFIG_S3C2410_NAND_HWECC
-void s3c24
1
0_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+void s3c24
x
0_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
{
- struct s3c24
10_nand *nand = s3c241
0_get_base_nand();
- debug("s3c24
1
0_nand_enable_hwecc(%p, %d)\n", mtd, mode);
+ struct s3c24
x0_nand *nand = s3c24x
0_get_base_nand();
+ debug("s3c24
x
0_nand_enable_hwecc(%p, %d)\n", mtd, mode);
writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf);
}
writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf);
}
-static int s3c24
1
0_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+static int s3c24
x
0_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
u_char *ecc_code)
{
- struct s3c24
10_nand *nand = s3c241
0_get_base_nand();
+ struct s3c24
x0_nand *nand = s3c24x
0_get_base_nand();
ecc_code[0] = readb(&nand->nfecc);
ecc_code[1] = readb(&nand->nfecc + 1);
ecc_code[2] = readb(&nand->nfecc + 2);
ecc_code[0] = readb(&nand->nfecc);
ecc_code[1] = readb(&nand->nfecc + 1);
ecc_code[2] = readb(&nand->nfecc + 2);
- debug("s3c24
1
0_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
-
mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
+ debug("s3c24
x
0_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
+ mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
return 0;
}
return 0;
}
-static int s3c24
1
0_nand_correct_data(struct mtd_info *mtd, u_char *dat,
+static int s3c24
x
0_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
if (read_ecc[0] == calc_ecc[0] &&
u_char *read_ecc, u_char *calc_ecc)
{
if (read_ecc[0] == calc_ecc[0] &&
@@
-103,7
+103,7
@@
static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
read_ecc[2] == calc_ecc[2])
return 0;
read_ecc[2] == calc_ecc[2])
return 0;
- printf("s3c24
1
0_nand_correct_data: not implemented\n");
+ printf("s3c24
x
0_nand_correct_data: not implemented\n");
return -1;
}
#endif
return -1;
}
#endif
@@
-113,7
+113,7
@@
int board_nand_init(struct nand_chip *nand)
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
- struct s3c24
10_nand *nand_reg = s3c241
0_get_base_nand();
+ struct s3c24
x0_nand *nand_reg = s3c24x
0_get_base_nand();
debug("board_nand_init()\n");
debug("board_nand_init()\n");
@@
-149,14
+149,14
@@
int board_nand_init(struct nand_chip *nand)
#endif
/* hwcontrol always must be implemented */
#endif
/* hwcontrol always must be implemented */
- nand->cmd_ctrl = s3c24
1
0_hwcontrol;
+ nand->cmd_ctrl = s3c24
x
0_hwcontrol;
- nand->dev_ready = s3c24
1
0_dev_ready;
+ nand->dev_ready = s3c24
x
0_dev_ready;
#ifdef CONFIG_S3C2410_NAND_HWECC
#ifdef CONFIG_S3C2410_NAND_HWECC
- nand->ecc.hwctl = s3c24
1
0_nand_enable_hwecc;
- nand->ecc.calculate = s3c24
1
0_nand_calculate_ecc;
- nand->ecc.correct = s3c24
1
0_nand_correct_data;
+ nand->ecc.hwctl = s3c24
x
0_nand_enable_hwecc;
+ nand->ecc.calculate = s3c24
x
0_nand_calculate_ecc;
+ nand->ecc.correct = s3c24
x
0_nand_correct_data;
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;