+ int max_frequency, ret;
+ struct clk clk;
+
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ struct dtd_rockchip_rk3399_sdhci_5_1 *dtplat = &plat->dtplat;
+
+ host->name = dev->name;
+ host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
+ max_frequency = dtplat->max_frequency;
+ ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &clk);
+#else
+ max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
+ ret = clk_get_by_index(dev, 0, &clk);
+#endif
+ if (!ret) {
+ ret = clk_set_rate(&clk, max_frequency);
+ if (IS_ERR_VALUE(ret))
+ printf("%s clk set rate fail!\n", __func__);
+ } else {
+ printf("%s fail to get clk\n", __func__);
+ }