#define I2C_BASE 0x43f80000
#define I2C_CLK_OFFSET 26
#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
#define I2C_BASE 0x43f80000
#define I2C_CLK_OFFSET 26
#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
#define I2C_BASE 0x43f84000
#define I2C_CLK_OFFSET 30
#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
#define I2C_BASE 0x43f84000
#define I2C_CLK_OFFSET 30
+#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
+#define I2C_BASE I2C1_BASE_ADDR
+#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
+#define I2C_BASE I2C2_BASE_ADDR
+#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
+#define I2C_BASE I2C_BASE_ADDR
static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144,
160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960,
1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840};
+static inline void i2c_reset(void)
+{
+ writew(0, I2C_BASE + I2CR); /* Reset module */
+ writew(0, I2C_BASE + I2SR);
+ writew(I2CR_IEN, I2C_BASE + I2CR);
+}
+
- DPRINTF("%s: speed: %d\n",__FUNCTION__, speed);
+ debug("%s: speed: %d\n", __func__, speed);
+
+ writew(i, I2C_BASE + IFDR);
+ i2c_reset();
+}
+
+static int wait_idle(void)
+{
+ int timeout = I2C_MAX_TIMEOUT;
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + IFDR) = i;
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
- __REG16(I2C_BASE + I2SR) = 0;
+ while ((readw(I2C_BASE + I2SR) & I2SR_IBB) && --timeout) {
+ writew(0, I2C_BASE + I2SR);
+ udelay(1);
+ }
+ return timeout ? timeout : (!(readw(I2C_BASE + I2SR) & I2SR_IBB));
+static int wait_complete(void)
+{
+ int timeout = I2C_MAX_TIMEOUT;
+
+ while ((!(readw(I2C_BASE + I2SR) & I2SR_ICF)) && (--timeout)) {
+ writew(0, I2C_BASE + I2SR);
+ udelay(1);
+ }
+ udelay(200);
+
+ writew(0, I2C_BASE + I2SR); /* clear interrupt */
+
+ return timeout;
+}
+
+
- __REG16(I2C_BASE + I2CR) = 0; /* Reset module */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN;
+ writew(0, I2C_BASE + I2CR); /* Reset module */
+ writew(I2CR_IEN, I2C_BASE + I2CR);
- __REG16(I2C_BASE + I2SR) = 0; /* clear interrupt */
- __REG16(I2C_BASE + I2CR) = I2CR_IEN | I2CR_MSTA | I2CR_MTX;
+ int i, retry = 0;
+ for (retry = 0; retry < 3; retry++) {
+ if (wait_idle())
+ break;
+ i2c_reset();
+ for (i = 0; i < I2C_MAX_TIMEOUT; i++)
+ udelay(1);
+ }
+ if (retry >= I2C_MAX_RETRIES) {
+ debug("%s:bus is busy(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
+ return -1;
+ }
+ writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR);
- if (tx_byte((addr >> (alen * 8)) & 0xff))
+ if (tx_byte((addr >> (alen * 8)) & 0xff) ||
+ (readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK)) {
+ debug("%s:device address cycle fail(%x)\n",
+ __func__, readw(I2C_BASE + I2SR));
return 0;
}
int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
{
return 0;
}
int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
{
- DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
+ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
+ __func__, chip, addr, alen, len);
if (i2c_addr(chip, addr, alen)) {
printf("i2c_addr failed\n");
return -1;
}
if (i2c_addr(chip, addr, alen)) {
printf("i2c_addr failed\n");
return -1;
}
int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
{
int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
{
- int timeout = 10000;
- DPRINTF("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",__FUNCTION__, chip, addr, alen, len);
+ int timeout = I2C_MAX_TIMEOUT;
+ debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n",
+ __func__, chip, addr, alen, len);