Major cleanup for AMCC PPC4xx eval boards.

[oweals/u-boot.git] / drivers / e1000.h

diff --git a/drivers/e1000.h b/drivers/e1000.h
index ba05ac0750dbfdeb9c33c22c657881ee8e03b830..0fbdc90b1f4c1523213fa0d3cb508b653e2e9f66 100644 (file)
--- a/drivers/e1000.h
+++ b/drivers/e1000.h
@@ -1,25 +1,25 @@
 /*******************************************************************************
 
 /*******************************************************************************
 

-  
+

   Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
   Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.

-  
-  This program is free software; you can redistribute it and/or modify it 
-  under the terms of the GNU General Public License as published by the Free 
-  Software Foundation; either version 2 of the License, or (at your option) 
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms of the GNU General Public License as published by the Free
+  Software Foundation; either version 2 of the License, or (at your option)

   any later version.
   any later version.

-  
-  This program is distributed in the hope that it will be useful, but WITHOUT 
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
+
+  This program is distributed in the hope that it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

   more details.
   more details.

-  
+

   You should have received a copy of the GNU General Public License along with
   You should have received a copy of the GNU General Public License along with

-  this program; if not, write to the Free Software Foundation, Inc., 59 
+  this program; if not, write to the Free Software Foundation, Inc., 59

   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
   Temple Place - Suite 330, Boston, MA  02111-1307, USA.

-  
+

   The full GNU General Public License is included in this distribution in the
   file called LICENSE.
   The full GNU General Public License is included in this distribution in the
   file called LICENSE.

-  
+

   Contact Information:
   Linux NICS <linux.nics@intel.com>
   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
   Contact Information:
   Linux NICS <linux.nics@intel.com>
   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497


@@ -251,7 +251,7 @@ struct e1000_phy_stats {
 /* This defines the bits that are set in the Interrupt Mask
  * Set/Read Register.  Each bit is documented below:
  *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
 /* This defines the bits that are set in the Interrupt Mask
  * Set/Read Register.  Each bit is documented below:
  *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)

- *   o RXSEQ  = Receive Sequence Error 
+ *   o RXSEQ  = Receive Sequence Error

  */
 #define POLL_IMS_ENABLE_MASK ( \
     E1000_IMS_RXDMT0 |         \
  */
 #define POLL_IMS_ENABLE_MASK ( \
     E1000_IMS_RXDMT0 |         \


@@ -275,7 +275,7 @@ struct e1000_phy_stats {
 /* The number of high/low register pairs in the RAR. The RAR (Receive Address
  * Registers) holds the directed and multicast addresses that we monitor. We
  * reserve one of these spots for our directed address, allowing us room for
 /* The number of high/low register pairs in the RAR. The RAR (Receive Address
  * Registers) holds the directed and multicast addresses that we monitor. We
  * reserve one of these spots for our directed address, allowing us room for

- * E1000_RAR_ENTRIES - 1 multicast addresses. 
+ * E1000_RAR_ENTRIES - 1 multicast addresses.

  */
 #define E1000_RAR_ENTRIES 16
 
  */
 #define E1000_RAR_ENTRIES 16
 


@@ -475,7 +475,7 @@ struct e1000_ffvt_entry {
 /* Register Set. (82543, 82544)
  *
  * Registers are defined to be 32 bits and  should be accessed as 32 bit values.
 /* Register Set. (82543, 82544)
  *
  * Registers are defined to be 32 bits and  should be accessed as 32 bit values.

- * These registers are physically located on the NIC, but are mapped into the 
+ * These registers are physically located on the NIC, but are mapped into the

  * host memory address space.
  *
  * RW - register is both readable and writable
  * host memory address space.
  *
  * RW - register is both readable and writable


@@ -1248,7 +1248,7 @@ struct e1000_hw {
 #define E1000_MANC_IPV6_EN       0x00000800    /* Enable IPv6 */
 #define E1000_MANC_SNAP_EN       0x00001000    /* Accept LLC/SNAP */
 #define E1000_MANC_ARP_EN        0x00002000    /* Enable ARP Request Filtering */
 #define E1000_MANC_IPV6_EN       0x00000800    /* Enable IPv6 */
 #define E1000_MANC_SNAP_EN       0x00001000    /* Accept LLC/SNAP */
 #define E1000_MANC_ARP_EN        0x00002000    /* Enable ARP Request Filtering */

-#define E1000_MANC_NEIGHBOR_EN   0x00004000    /* Enable Neighbor Discovery 
+#define E1000_MANC_NEIGHBOR_EN   0x00004000    /* Enable Neighbor Discovery

                                                 * Filtering */
 #define E1000_MANC_TCO_RESET     0x00010000    /* TCO Reset Occurred */
 #define E1000_MANC_RCV_TCO_EN    0x00020000    /* Receive TCO Packets Enabled */
                                                 * Filtering */
 #define E1000_MANC_TCO_RESET     0x00010000    /* TCO Reset Occurred */
 #define E1000_MANC_RCV_TCO_EN    0x00020000    /* Receive TCO Packets Enabled */


@@ -1287,9 +1287,9 @@ struct e1000_hw {
 #define ID_LED_RESERVED_0000 0x0000
 #define ID_LED_RESERVED_FFFF 0xFFFF
 #define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2 << 12) | \
 #define ID_LED_RESERVED_0000 0x0000
 #define ID_LED_RESERVED_FFFF 0xFFFF
 #define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2 << 12) | \

-                              (ID_LED_OFF1_OFF2 << 8) | \
-                              (ID_LED_DEF1_DEF2 << 4) | \
-                              (ID_LED_DEF1_DEF2))
+                             (ID_LED_OFF1_OFF2 << 8) | \
+                             (ID_LED_DEF1_DEF2 << 4) | \
+                             (ID_LED_DEF1_DEF2))

 #define ID_LED_DEF1_DEF2     0x1
 #define ID_LED_DEF1_ON2      0x2
 #define ID_LED_DEF1_OFF2     0x3
 #define ID_LED_DEF1_DEF2     0x1
 #define ID_LED_DEF1_ON2      0x2
 #define ID_LED_DEF1_OFF2     0x3


@@ -1410,26 +1410,26 @@ struct e1000_hw {
 
 /* The number of bits that we need to shift right to move the "pause"
  * bits from the EEPROM (bits 13:12) to the "pause" (bits 8:7) field
 
 /* The number of bits that we need to shift right to move the "pause"
  * bits from the EEPROM (bits 13:12) to the "pause" (bits 8:7) field

- * in the TXCW register 
+ * in the TXCW register

  */
 #define PAUSE_SHIFT 5
 
 /* The number of bits that we need to shift left to move the "SWDPIO"
  * bits from the EEPROM (bits 8:5) to the "SWDPIO" (bits 25:22) field
  */
 #define PAUSE_SHIFT 5
 
 /* The number of bits that we need to shift left to move the "SWDPIO"
  * bits from the EEPROM (bits 8:5) to the "SWDPIO" (bits 25:22) field

- * in the CTRL register 
+ * in the CTRL register

  */
 #define SWDPIO_SHIFT 17
 
 /* The number of bits that we need to shift left to move the "SWDPIO_EXT"
  * bits from the EEPROM word F (bits 7:4) to the bits 11:8 of The
  * Extended CTRL register.
  */
 #define SWDPIO_SHIFT 17
 
 /* The number of bits that we need to shift left to move the "SWDPIO_EXT"
  * bits from the EEPROM word F (bits 7:4) to the bits 11:8 of The
  * Extended CTRL register.

- * in the CTRL register 
+ * in the CTRL register

  */
 #define SWDPIO__EXT_SHIFT 4
 
 /* The number of bits that we need to shift left to move the "ILOS"
  * bit from the EEPROM (bit 4) to the "ILOS" (bit 7) field
  */
 #define SWDPIO__EXT_SHIFT 4
 
 /* The number of bits that we need to shift left to move the "ILOS"
  * bit from the EEPROM (bit 4) to the "ILOS" (bit 7) field

- * in the CTRL register 
+ * in the CTRL register

  */
 #define ILOS_SHIFT  3
 
  */
 #define ILOS_SHIFT  3
 


@@ -1446,7 +1446,7 @@ struct e1000_hw {
 /* TBI_ACCEPT macro definition:
  *
  * This macro requires:
 /* TBI_ACCEPT macro definition:
  *
  * This macro requires:

- *      adapter = a pointer to struct e1000_hw 
+ *      adapter = a pointer to struct e1000_hw

  *      status = the 8 bit status field of the RX descriptor with EOP set
  *      error = the 8 bit error field of the RX descriptor with EOP set
  *      length = the sum of all the length fields of the RX descriptors that
  *      status = the 8 bit status field of the RX descriptor with EOP set
  *      error = the 8 bit error field of the RX descriptor with EOP set
  *      length = the sum of all the length fields of the RX descriptors that


@@ -1455,7 +1455,7 @@ struct e1000_hw {
  *      max_frame_length = the maximum frame length we want to accept.
  *      min_frame_length = the minimum frame length we want to accept.
  *
  *      max_frame_length = the maximum frame length we want to accept.
  *      min_frame_length = the minimum frame length we want to accept.
  *

- * This macro is a conditional that should be used in the interrupt 
+ * This macro is a conditional that should be used in the interrupt

  * handler's Rx processing routine when RxErrors have been detected.
  *
  * Typical use:
  * handler's Rx processing routine when RxErrors have been detected.
  *
  * Typical use:


@@ -1475,10 +1475,10 @@ struct e1000_hw {
      (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
      ((last_byte) == CARRIER_EXTENSION) && \
      (((status) & E1000_RXD_STAT_VP) ? \
      (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
      ((last_byte) == CARRIER_EXTENSION) && \
      (((status) & E1000_RXD_STAT_VP) ? \

-          (((length) > ((adapter)->min_frame_size - VLAN_TAG_SIZE)) && \
-           ((length) <= ((adapter)->max_frame_size + 1))) : \
-          (((length) > (adapter)->min_frame_size) && \
-           ((length) <= ((adapter)->max_frame_size + VLAN_TAG_SIZE + 1)))))
+         (((length) > ((adapter)->min_frame_size - VLAN_TAG_SIZE)) && \
+          ((length) <= ((adapter)->max_frame_size + 1))) : \
+         (((length) > (adapter)->min_frame_size) && \
+          ((length) <= ((adapter)->max_frame_size + VLAN_TAG_SIZE + 1)))))

 
 /* Structures, enums, and macros for the PHY */
 
 
 /* Structures, enums, and macros for the PHY */
 


@@ -1589,7 +1589,7 @@ struct e1000_hw {
                                         * 0 = cannot comply with msg
                                         */
 #define NPTX_MSG_PAGE       0x2000     /* formatted(1)/unformatted(0) pg */
                                         * 0 = cannot comply with msg
                                         */
 #define NPTX_MSG_PAGE       0x2000     /* formatted(1)/unformatted(0) pg */

-#define NPTX_NEXT_PAGE      0x8000     /* 1 = addition NP will follow 
+#define NPTX_NEXT_PAGE      0x8000     /* 1 = addition NP will follow

                                         * 0 = sending last NP
                                         */
 
                                         * 0 = sending last NP
                                         */
 


@@ -1598,13 +1598,13 @@ struct e1000_hw {
 #define LP_RNPR_TOGGLE         0x0800  /* Toggles between exchanges
                                         * of different NP
                                         */
 #define LP_RNPR_TOGGLE         0x0800  /* Toggles between exchanges
                                         * of different NP
                                         */

-#define LP_RNPR_ACKNOWLDGE2    0x1000  /* 1 = will comply with msg 
+#define LP_RNPR_ACKNOWLDGE2    0x1000  /* 1 = will comply with msg

                                         * 0 = cannot comply with msg
                                         */
 #define LP_RNPR_MSG_PAGE       0x2000  /* formatted(1)/unformatted(0) pg */
 #define LP_RNPR_ACKNOWLDGE     0x4000  /* 1 = ACK / 0 = NO ACK */
 #define LP_RNPR_NEXT_PAGE      0x8000  /* 1 = addition NP will follow
                                         * 0 = cannot comply with msg
                                         */
 #define LP_RNPR_MSG_PAGE       0x2000  /* formatted(1)/unformatted(0) pg */
 #define LP_RNPR_ACKNOWLDGE     0x4000  /* 1 = ACK / 0 = NO ACK */
 #define LP_RNPR_NEXT_PAGE      0x8000  /* 1 = addition NP will follow

-                                        * 0 = sending last NP 
+                                        * 0 = sending last NP

                                         */
 
 /* 1000BASE-T Control Register */
                                         */
 
 /* 1000BASE-T Control Register */


@@ -1651,18 +1651,18 @@ struct e1000_hw {
 #define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
 #define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reversal enabled */
 #define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */
 #define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
 #define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reversal enabled */
 #define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */

-#define M88E1000_PSCR_CLK125_DISABLE    0x0010 /* 1=CLK125 low, 
+#define M88E1000_PSCR_CLK125_DISABLE    0x0010 /* 1=CLK125 low,

                                                 * 0=CLK125 toggling
                                                 */
 #define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000  /* MDI Crossover Mode bits 6:5 */
                                               /* Manual MDI configuration */
 #define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
 #define M88E1000_PSCR_AUTO_X_1000T     0x0040  /* 1000BASE-T: Auto crossover,
                                                 * 0=CLK125 toggling
                                                 */
 #define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000  /* MDI Crossover Mode bits 6:5 */
                                               /* Manual MDI configuration */
 #define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
 #define M88E1000_PSCR_AUTO_X_1000T     0x0040  /* 1000BASE-T: Auto crossover,

-                                                *  100BASE-TX/10BASE-T: 
+                                                *  100BASE-TX/10BASE-T:

                                                 *  MDI Mode
                                                 */
                                                 *  MDI Mode
                                                 */

-#define M88E1000_PSCR_AUTO_X_MODE      0x0060  /* Auto crossover enabled 
-                                                * all speeds. 
+#define M88E1000_PSCR_AUTO_X_MODE      0x0060  /* Auto crossover enabled
+                                                * all speeds.

                                                 */
 #define M88E1000_PSCR_10BT_EXT_DIST_ENABLE 0x0080
                                        /* 1=Enable Extended 10BASE-T distance
                                                 */
 #define M88E1000_PSCR_10BT_EXT_DIST_ENABLE 0x0080
                                        /* 1=Enable Extended 10BASE-T distance


@@ -1703,7 +1703,7 @@ struct e1000_hw {
 #define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000   /* 1=Lost lock detect enabled.
                                                 * Will assert lost lock and bring
                                                 * link down if idle not seen
 #define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000   /* 1=Lost lock detect enabled.
                                                 * Will assert lost lock and bring
                                                 * link down if idle not seen

-                                                * within 1ms in 1000BASE-T 
+                                                * within 1ms in 1000BASE-T

                                                 */
 /* Number of times we will attempt to autonegotiate before downshifting if we
  * are the master */
                                                 */
 /* Number of times we will attempt to autonegotiate before downshifting if we
  * are the master */