+
+static const struct udevice_id uniphier_clk_match[] = {
+ /* System clock */
+ {
+ .compatible = "socionext,uniphier-ld4-clock",
+ .data = (ulong)uniphier_pxs2_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro4-clock",
+ .data = (ulong)uniphier_pxs2_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-sld8-clock",
+ .data = (ulong)uniphier_pxs2_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro5-clock",
+ .data = (ulong)uniphier_pxs2_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs2-clock",
+ .data = (ulong)uniphier_pxs2_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld11-clock",
+ .data = (ulong)uniphier_ld20_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld20-clock",
+ .data = (ulong)uniphier_ld20_sys_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs3-clock",
+ .data = (ulong)uniphier_pxs3_sys_clk_data,
+ },
+ /* Media I/O clock */
+ {
+ .compatible = "socionext,uniphier-ld4-mio-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro4-mio-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-sld8-mio-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pro5-sd-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs2-sd-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld11-mio-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-ld20-sd-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ {
+ .compatible = "socionext,uniphier-pxs3-sd-clock",
+ .data = (ulong)uniphier_mio_clk_data,
+ },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(uniphier_clk) = {
+ .name = "uniphier-clk",
+ .id = UCLASS_CLK,
+ .of_match = uniphier_clk_match,
+ .probe = uniphier_clk_probe,
+ .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
+ .ops = &uniphier_clk_ops,
+};