+static int rk3328_gmac2io_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct rk3328_grf_regs *grf;
+ const char *clock_output_name;
+ int ret;
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ /*
+ * If the requested parent is in the same clock-controller and the id
+ * is SCLK_MAC2IO_SRC ("clk_mac2io_src"), switch to the internal clock.
+ */
+ if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO_SRC)) {
+ debug("%s: switching RGMII to SCLK_MAC2IO_SRC\n", __func__);
+ rk_clrreg(&grf->mac_con[1], BIT(10));
+ return 0;
+ }
+
+ /*
+ * Otherwise, we need to check the clock-output-names of the
+ * requested parent to see if the requested id is "gmac_clkin".
+ */
+ ret = dev_read_string_index(parent->dev, "clock-output-names",
+ parent->id, &clock_output_name);
+ if (ret < 0)
+ return -ENODATA;
+
+ /* If this is "gmac_clkin", switch to the external clock input */
+ if (!strcmp(clock_output_name, "gmac_clkin")) {
+ debug("%s: switching RGMII to CLKIN\n", __func__);
+ rk_setreg(&grf->mac_con[1], BIT(10));
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int rk3328_gmac2io_ext_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct rk3328_grf_regs *grf;
+ const char *clock_output_name;
+ int ret;
+
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+ /*
+ * If the requested parent is in the same clock-controller and the id
+ * is SCLK_MAC2IO ("clk_mac2io"), switch to the internal clock.
+ */
+ if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC2IO)) {
+ debug("%s: switching RGMII to SCLK_MAC2IO\n", __func__);
+ rk_clrreg(&grf->soc_con[4], BIT(14));
+ return 0;
+ }
+
+ /*
+ * Otherwise, we need to check the clock-output-names of the
+ * requested parent to see if the requested id is "gmac_clkin".
+ */
+ ret = dev_read_string_index(parent->dev, "clock-output-names",
+ parent->id, &clock_output_name);
+ if (ret < 0)
+ return -ENODATA;
+
+ /* If this is "gmac_clkin", switch to the external clock input */
+ if (!strcmp(clock_output_name, "gmac_clkin")) {
+ debug("%s: switching RGMII to CLKIN\n", __func__);
+ rk_setreg(&grf->soc_con[4], BIT(14));
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static int rk3328_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ switch (clk->id) {
+ case SCLK_MAC2IO:
+ return rk3328_gmac2io_set_parent(clk, parent);
+ case SCLK_MAC2IO_EXT:
+ return rk3328_gmac2io_ext_set_parent(clk, parent);
+ case DCLK_LCDC:
+ case SCLK_PDM:
+ case SCLK_RTC32K:
+ case SCLK_UART0:
+ case SCLK_UART1:
+ case SCLK_UART2:
+ return 0;
+ }
+
+ debug("%s: unsupported clk %ld\n", __func__, clk->id);
+ return -ENOENT;
+}
+